Unverified Commit 17e26de1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dts-for-v6.4-tag2' of... 

Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.4 (take two)

  - Add PWM support for the R-Car H1 and H2 SoCs,
  - Add slide switch and I2C support for the Marzen development board,
  - Add SCI (serial) and Camera support for the RZ/G2L SoC and the
    RZ/G2L SMARC EVK development board,
  - Add IOMMU support for the R-Car V4H SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
  arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712
  arm64: dts: renesas: r8a779g0: Add iommus to MMC node
  arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes
  arm64: dts: renesas: r8a779g0: Add IPMMU nodes
  arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main
  arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support
  arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes
  arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
  ARM: dts: r8a7790: Add PWM device nodes
  ARM: dts: r8a7790: Add TPU device node
  ARM: dts: marzen: Enable I2C support
  ARM: dts: marzen: Add slide switches
  ARM: dts: r8a7779: Add PWM support
  dt-bindings: clock: r8a7779: Add PWM module clock
  arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes

Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2925732f 2f04079b

arch/arm/boot/dts/r8a7779-marzen.dts

+69 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
/dts-v1/;

#include "r8a7779.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {
@@ -66,6 +67,51 @@ 
		vdd33a-supply = <&fixedregulator3v3>;

	};



	keyboard-irq {

		compatible = "gpio-keys";



		pinctrl-0 = <&keyboard_irq_pins>;

		pinctrl-names = "default";



		interrupt-parent = <&gpio0>;



		key-1 {

			interrupts = <17 IRQ_TYPE_EDGE_FALLING>;

			linux,code = <KEY_1>;

			label = "SW1-1";

			wakeup-source;

			debounce-interval = <20>;

		};

		key-2 {

			interrupts = <18 IRQ_TYPE_EDGE_FALLING>;

			linux,code = <KEY_2>;

			label = "SW1-2";

			wakeup-source;

			debounce-interval = <20>;

		};

	};



	keyboard-gpio {

		compatible = "gpio-keys-polled";

		poll-interval = <50>;



		pinctrl-0 = <&keyboard_gpio_pins>;

		pinctrl-names = "default";



		key-3 {

			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_3>;

			label = "SW1-3";

			debounce-interval = <20>;

		};

		key-4 {

			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_4>;

			label = "SW1-4";

			debounce-interval = <20>;

		};

	};



	leds {

		compatible = "gpio-leds";

		led2 {
@@ -161,6 +207,20 @@ 
	};

};



&gpio0 {

	keyboard-irq-hog {

		gpio-hog;

		gpios = <17 GPIO_ACTIVE_LOW>, <18 GPIO_ACTIVE_LOW>;

		input;

	};

};



&i2c0 {

	status = "okay";



	clock-frequency = <100000>;

};



&irqpin0 {

	status = "okay";

};
@@ -223,6 +283,15 @@ 
		groups = "hspi0";

		function = "hspi0";

	};



	keyboard_irq_pins: keyboard-irq {

		pins = "GP_0_17", "GP_0_18";

		bias-pull-up;

	};

	keyboard_gpio_pins: keyboard-gpio {

		pins = "GP_0_19", "GP_0_20";

		bias-pull-up;

	};

};



&sata {

arch/arm/boot/dts/r8a7779.dtsi

+78 −13
Original line number Diff line number Diff line
@@ -324,6 +324,69 @@ 
		status = "disabled";

	};



	pwm0: pwm@ffe50000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe50000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm1: pwm@ffe51000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe51000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm2: pwm@ffe52000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe52000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm3: pwm@ffe53000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe53000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm4: pwm@ffe54000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe54000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm5: pwm@ffe55000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe55000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pwm6: pwm@ffe56000 {

		compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";

		reg = <0xffe56000 0x8>;

		clocks = <&mstp0_clks R8A7779_CLK_PWM>;

		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	pfc: pinctrl@fffc0000 {

		compatible = "renesas,pfc-r8a7779";

		reg = <0xfffc0000 0x23c>;
@@ -554,7 +617,8 @@ 
			compatible = "renesas,r8a7779-mstp-clocks",

				     "renesas,cpg-mstp-clocks";

			reg = <0xffc80030 4>;

			clocks = <&cpg_clocks R8A7779_CLK_S>,

			clocks = <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,
@@ -572,20 +636,21 @@ 
				 <&cpg_clocks R8A7779_CLK_P>;

			#clock-cells = <1>;

			clock-indices = <

				R8A7779_CLK_HSPI R8A7779_CLK_TMU2

				R8A7779_CLK_TMU1 R8A7779_CLK_TMU0

				R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0

				R8A7779_CLK_SCIF5 R8A7779_CLK_SCIF4

				R8A7779_CLK_SCIF3 R8A7779_CLK_SCIF2

				R8A7779_CLK_SCIF1 R8A7779_CLK_SCIF0

				R8A7779_CLK_I2C3 R8A7779_CLK_I2C2

				R8A7779_CLK_I2C1 R8A7779_CLK_I2C0

				R8A7779_CLK_PWM R8A7779_CLK_HSPI

				R8A7779_CLK_TMU2 R8A7779_CLK_TMU1

				R8A7779_CLK_TMU0 R8A7779_CLK_HSCIF1

				R8A7779_CLK_HSCIF0 R8A7779_CLK_SCIF5

				R8A7779_CLK_SCIF4 R8A7779_CLK_SCIF3

				R8A7779_CLK_SCIF2 R8A7779_CLK_SCIF1

				R8A7779_CLK_SCIF0 R8A7779_CLK_I2C3

				R8A7779_CLK_I2C2 R8A7779_CLK_I2C1

				R8A7779_CLK_I2C0

			>;

			clock-output-names =

				"hspi", "tmu2", "tmu1", "tmu0", "hscif1",

				"hscif0", "scif5", "scif4", "scif3", "scif2",

				"scif1", "scif0", "i2c3", "i2c2", "i2c1",

				"i2c0";

				"pwm", "hspi", "tmu2", "tmu1", "tmu0",

				"hscif1", "hscif0", "scif5", "scif4", "scif3",

				"scif2", "scif1", "scif0", "i2c3", "i2c2",

				"i2c1", "i2c0";

		};

		mstp1_clks: clocks@ffc80034 {

			compatible = "renesas,r8a7779-mstp-clocks",

arch/arm/boot/dts/r8a7790.dtsi

+81 −0
Original line number Diff line number Diff line
@@ -376,6 +376,17 @@ 
			reg = <0 0xe6060000 0 0x250>;

		};



		tpu: pwm@e60f0000 {

			compatible = "renesas,tpu-r8a7790", "renesas,tpu";

			reg = <0 0xe60f0000 0 0x148>;

			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 304>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 304>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		cpg: clock-controller@e6150000 {

			compatible = "renesas,r8a7790-cpg-mssr";

			reg = <0 0xe6150000 0 0x1000>;
@@ -1037,6 +1048,76 @@ 
			status = "disabled";

		};



		pwm0: pwm@e6e30000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e30000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm1: pwm@e6e31000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e31000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm2: pwm@e6e32000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e32000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm3: pwm@e6e33000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e33000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm4: pwm@e6e34000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e34000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm5: pwm@e6e35000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e35000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		pwm6: pwm@e6e36000 {

			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";

			reg = <0 0xe6e36000 0 0x8>;

			clocks = <&cpg CPG_MOD 523>;

			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;

			resets = <&cpg 523>;

			#pwm-cells = <2>;

			status = "disabled";

		};



		can0: can@e6e80000 {

			compatible = "renesas,can-r8a7790",

				     "renesas,rcar-gen2-can";

arch/arm64/boot/dts/renesas/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -76,9 +76,11 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb 
dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb



dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc.dtb

dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo



dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb

dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb

dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo



dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb

arch/arm64/boot/dts/renesas/r8a779a0-falcon-csi-dsi.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -5,6 +5,8 @@ 
 * Copyright (C) 2021 Glider bv

 */



#include <dt-bindings/media/video-interfaces.h>



&csi40 {

	status = "okay";
@@ -105,6 +107,7 @@ 
			port@4 {

				reg = <4>;

				max96712_out0: endpoint {

					bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;

					clock-lanes = <0>;

					data-lanes = <1 2 3 4>;

					remote-endpoint = <&csi40_in>;
@@ -125,6 +128,7 @@ 
			port@4 {

				reg = <4>;

				max96712_out1: endpoint {

					bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;

					clock-lanes = <0>;

					data-lanes = <1 2 3 4>;

					lane-polarities = <0 0 0 0 1>;
@@ -146,6 +150,7 @@ 
			port@4 {

				reg = <4>;

				max96712_out2: endpoint {

					bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;

					clock-lanes = <0>;

					data-lanes = <1 2 3 4>;

					lane-polarities = <0 0 0 0 1>;