Commit 17d50f89 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v5.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc 

Pull MMC fixes from Ulf Hansson:

 - tmio: Re-enable card irqs after a reset

 - mtk-sd: Fixup probing of cqhci for crypto

 - cqhci: Fix support for suspend/resume

 - vub300: Fix control-message timeouts

 - dw_mmc-exynos: Fix support for tuning

 - winbond: Silences build errors on M68K

 - sdhci-esdhc-imx: Fix support for tuning

 - sdhci-pci: Read card detect from ACPI for Intel Merrifield

 - sdhci: Fix eMMC support for Thundercomm TurboX CM2290

* tag 'mmc-v5.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: tmio: reenable card irqs after the reset callback
  mmc: mediatek: Move cqhci init behind ungate clock
  mmc: cqhci: clear HALT state after CQE enable
  mmc: vub300: fix control-message timeouts
  mmc: dw_mmc: exynos: fix the finding clock sample value
  mmc: winbond: don't build on M68K
  mmc: sdhci-esdhc-imx: clear the buffer_read_ready to reset standard tuning circuit
  mmc: sdhci-pci: Read card detect from ACPI for Intel Merrifield
  mmc: sdhci: Map more voltage level to SDHCI_POWER_330
parents fd919bbd 90935eb3

drivers/mmc/host/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -506,7 +506,7 @@ config MMC_OMAP_HS 


config MMC_WBSD

	tristate "Winbond W83L51xD SD/MMC Card Interface support"

	depends on ISA_DMA_API

	depends on ISA_DMA_API && !M68K

	help

	  This selects the Winbond(R) W83L51xD Secure digital and

	  Multimedia card Interface.

drivers/mmc/host/cqhci-core.c

+3 −0
Original line number Diff line number Diff line
@@ -282,6 +282,9 @@ static void __cqhci_enable(struct cqhci_host *cq_host) 


	cqhci_writel(cq_host, cqcfg, CQHCI_CFG);



	if (cqhci_readl(cq_host, CQHCI_CTL) & CQHCI_HALT)

		cqhci_writel(cq_host, 0, CQHCI_CTL);



	mmc->cqe_on = true;



	if (cq_host->ops->enable)

drivers/mmc/host/dw_mmc-exynos.c

+14 −0
Original line number Diff line number Diff line
@@ -464,6 +464,18 @@ static s8 dw_mci_exynos_get_best_clksmpl(u8 candiates) 
		}

	}



	/*

	 * If there is no cadiates value, then it needs to return -EIO.

	 * If there are candiates values and don't find bset clk sample value,

	 * then use a first candiates clock sample value.

	 */

	for (i = 0; i < iter; i++) {

		__c = ror8(candiates, i);

		if ((__c & 0x1) == 0x1) {

			loc = i;

			goto out;

		}

	}

out:

	return loc;

}
@@ -494,6 +506,8 @@ static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode) 
		priv->tuned_sample = found;

	} else {

		ret = -EIO;

		dev_warn(&mmc->class_dev,

			"There is no candiates value about clksmpl!\n");

	}



	return ret;

drivers/mmc/host/mtk-sd.c

+19 −19
Original line number Diff line number Diff line
@@ -2577,6 +2577,25 @@ static int msdc_drv_probe(struct platform_device *pdev) 
		host->dma_mask = DMA_BIT_MASK(32);

	mmc_dev(mmc)->dma_mask = &host->dma_mask;



	host->timeout_clks = 3 * 1048576;

	host->dma.gpd = dma_alloc_coherent(&pdev->dev,

				2 * sizeof(struct mt_gpdma_desc),

				&host->dma.gpd_addr, GFP_KERNEL);

	host->dma.bd = dma_alloc_coherent(&pdev->dev,

				MAX_BD_NUM * sizeof(struct mt_bdma_desc),

				&host->dma.bd_addr, GFP_KERNEL);

	if (!host->dma.gpd || !host->dma.bd) {

		ret = -ENOMEM;

		goto release_mem;

	}

	msdc_init_gpd_bd(host, &host->dma);

	INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout);

	spin_lock_init(&host->lock);



	platform_set_drvdata(pdev, mmc);

	msdc_ungate_clock(host);

	msdc_init_hw(host);



	if (mmc->caps2 & MMC_CAP2_CQE) {

		host->cq_host = devm_kzalloc(mmc->parent,

					     sizeof(*host->cq_host),
@@ -2597,25 +2616,6 @@ static int msdc_drv_probe(struct platform_device *pdev) 
		mmc->max_seg_size = 64 * 1024;

	}



	host->timeout_clks = 3 * 1048576;

	host->dma.gpd = dma_alloc_coherent(&pdev->dev,

				2 * sizeof(struct mt_gpdma_desc),

				&host->dma.gpd_addr, GFP_KERNEL);

	host->dma.bd = dma_alloc_coherent(&pdev->dev,

				MAX_BD_NUM * sizeof(struct mt_bdma_desc),

				&host->dma.bd_addr, GFP_KERNEL);

	if (!host->dma.gpd || !host->dma.bd) {

		ret = -ENOMEM;

		goto release_mem;

	}

	msdc_init_gpd_bd(host, &host->dma);

	INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout);

	spin_lock_init(&host->lock);



	platform_set_drvdata(pdev, mmc);

	msdc_ungate_clock(host);

	msdc_init_hw(host);



	ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq,

			       IRQF_TRIGGER_NONE, pdev->name, host);

	if (ret)

drivers/mmc/host/sdhci-esdhc-imx.c

+16 −0
Original line number Diff line number Diff line
@@ -1187,6 +1187,7 @@ static void esdhc_reset_tuning(struct sdhci_host *host) 
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

	struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);

	u32 ctrl;

	int ret;



	/* Reset the tuning circuit */

	if (esdhc_is_usdhc(imx_data)) {
@@ -1199,7 +1200,22 @@ static void esdhc_reset_tuning(struct sdhci_host *host) 
		} else if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) {

			ctrl = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);

			ctrl &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;

			ctrl &= ~ESDHC_MIX_CTRL_EXE_TUNE;

			writel(ctrl, host->ioaddr + SDHCI_AUTO_CMD_STATUS);

			/* Make sure ESDHC_MIX_CTRL_EXE_TUNE cleared */

			ret = readl_poll_timeout(host->ioaddr + SDHCI_AUTO_CMD_STATUS,

				ctrl, !(ctrl & ESDHC_MIX_CTRL_EXE_TUNE), 1, 50);

			if (ret == -ETIMEDOUT)

				dev_warn(mmc_dev(host->mmc),

				 "Warning! clear execute tuning bit failed\n");

			/*

			 * SDHCI_INT_DATA_AVAIL is W1C bit, set this bit will clear the

			 * usdhc IP internal logic flag execute_tuning_with_clr_buf, which

			 * will finally make sure the normal data transfer logic correct.

			 */

			ctrl = readl(host->ioaddr + SDHCI_INT_STATUS);

			ctrl |= SDHCI_INT_DATA_AVAIL;

			writel(ctrl, host->ioaddr + SDHCI_INT_STATUS);

		}

	}

}