Commit 17d358c1 authored by Qiuxu Zhuo's avatar Qiuxu Zhuo Committed by Wen Jin
Browse files

EDAC/i10nm: Add Intel Sierra Forest server support 

mainline inclusion
from mainline-v6.4-rc1
commit 96ae3995
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8Y47N
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=96ae3995c6930d2b6c11a48dad9a59ddd34abaad



--------------------------------

The Sierra Forest CPU model uses similar memory controller registers as
Granite Rapids server. Add Sierra Forest CPU model ID for EDAC support.

Intel-SIG: commit 96ae3995 EDAC/i10nm: Add Intel Sierra Forest server support.
Backport to support Sierra Forest.

Tested-by: default avatarLi Zhang <li4.zhang@intel.com>
Signed-off-by: default avatarQiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230410131531.11914-1-qiuxu.zhuo@intel.com


Signed-off-by: default avatarWen Jin <wen.jin@intel.com>
parent bc755027

drivers/edac/i10nm_base.c

+1 −0
Original line number Diff line number Diff line
@@ -906,6 +906,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = { 
	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

	{}

};

MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);