Commit 17c65d6f authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amdgpu: correct the wrong cached state for GMC on PICASSO 

Pair the operations did in GMC ->hw_init and ->hw_fini. That
can help to maintain correct cached state for GMC and avoid
unintention gate operation dropping due to wrong cached state.

BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1828



Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarGuchun Chen <guchun.chen@amd.com>
Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 791255ca

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+8 −0
Original line number Diff line number Diff line
@@ -1808,6 +1808,14 @@ static int gmc_v9_0_hw_fini(void *handle) 
		return 0;

	}



	/*

	 * Pair the operations did in gmc_v9_0_hw_init and thus maintain

	 * a correct cached state for GMC. Otherwise, the "gate" again

	 * operation on S3 resuming will fail due to wrong cached state.

	 */

	if (adev->mmhub.funcs->update_power_gating)

		adev->mmhub.funcs->update_power_gating(adev, false);



	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

+4 −4
Original line number Diff line number Diff line
@@ -301,10 +301,10 @@ static void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, 
	if (amdgpu_sriov_vf(adev))

		return;



	if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {

		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true);



	}

	if (adev->pg_flags & AMD_PG_SUPPORT_MMHUB)

		amdgpu_dpm_set_powergating_by_smu(adev,

						  AMD_IP_BLOCK_TYPE_GMC,

						  enable);

}



static int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

+6 −1
Original line number Diff line number Diff line
@@ -1328,6 +1328,11 @@ static int pp_set_powergating_by_smu(void *handle, 
		pp_dpm_powergate_vce(handle, gate);

		break;

	case AMD_IP_BLOCK_TYPE_GMC:

		/*

		 * For now, this is only used on PICASSO.

		 * And only "gate" operation is supported.

		 */

		if (gate)

			pp_dpm_powergate_mmhub(handle);

		break;

	case AMD_IP_BLOCK_TYPE_GFX: