Commit 17bbc46f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-updates-for-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "A rather small update, there are no new drivers, just improvements and
  refactoring in existing ones.

  Thanks to migrating of several drivers to using generalized APIs and
  dropping of OF interfaces in favor of using software nodes we're
  actually removing more code than we're adding.

  Core GPIOLIB:
   - drop several OF interfaces after moving a significant part of the
     code to using software nodes
   - remove more interfaces referring to the global GPIO numberspace
     that we're getting rid of
   - improvements in the gpio-regmap library
   - add helper for GPIO device reference counting
   - remove unused APIs
   - minor tweaks like sorting headers alphabetically

  Extended support in existing drivers:
   - add support for Tegra 234 PMC to gpio-tegra186

  Driver improvements:
   - migrate the 104-dio/idi family of drivers to using the regmap-irq
     API
   - migrate gpio-i8255 and gpio-mm to the GPIO regmap API
   - clean-ups in gpio-pca953x
   - remove duplicate assignments of of_gpio_n_cells in gpio-davinci,
     gpio-ge, gpio-xilinx, gpio-zevio and gpio-wcd934x
   - improvements to gpio-pcf857x: implement get/set_multiple callbacks,
     use generic device properties instead of OF + minor tweaks
   - fix OF-related header includes and Kconfig dependencies in
     gpio-zevio
   - dynamically allocate the GPIO base in gpio-omap
   - use a dedicated printf specifier for printing fwnode info in
     gpio-sim
   - use dev_name() for the GPIO chip label in gpio-vf610
   - other minor tweaks and fixes

  Documentation:
   - remove mentions of legacy API from comments in various places
   - convert the DT binding documents to YAML schema for Fujitsu
     MB86S7x, Unisoc GPIO and Unisoc EIC
   - document the Unisoc UMS512 controller in DT bindings"

* tag 'gpio-updates-for-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (54 commits)
  gpio: sim: Use %pfwP specifier instead of calling fwnode API directly
  gpio: tegra186: remove unneeded loop in tegra186_gpio_init_route_mapping()
  gpiolib: of: Move enum of_gpio_flags to its only user
  gpio: mvebu: Use IS_REACHABLE instead of IS_ENABLED for CONFIG_PWM
  gpio: zevio: Add missing header
  gpio: Get rid of gpio_to_chip()
  gpio: pcf857x: Drop unneeded explicit casting
  gpio: pcf857x: Make use of device properties
  gpio: pcf857x: Get rid of legacy platform data
  gpio: rockchip: Do not mention legacy API in the code
  gpio: wcd934x: Remove duplicate assignment of of_gpio_n_cells
  gpio: zevio: Use proper headers and drop OF_GPIO dependency
  gpio: zevio: Remove duplicate assignment of of_gpio_n_cells
  gpio: xilinx: Remove duplicate assignment of of_gpio_n_cells
  dt-bindings: gpio: Add compatible string for Unisoc UMS512
  dt-bindings: gpio: Convert Unisoc EIC controller binding to yaml
  dt-bindings: gpio: Convert Unisoc GPIO controller binding to yaml
  gpio: ge: Remove duplicate assignment of of_gpio_n_cells
  gpio: davinci: Remove duplicate assignment of of_gpio_n_cells
  gpio: omap: use dynamic allocation of base
  ...
parents 13e574b4 4827aae0
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Fujitsu MB86S7x GPIO Controller
-------------------------------

Required properties:
- compatible: Should be "fujitsu,mb86s70-gpio"
- reg: Base address and length of register space
- clocks: Specify the clock
- gpio-controller: Marks the device node as a gpio controller.
- #gpio-cells: Should be <2>. The first cell is the pin number and the
  second cell is used to specify optional parameters:
   - bit 0 specifies polarity (0 for normal, 1 for inverted).

Examples:
	gpio0: gpio@31000000 {
		compatible = "fujitsu,mb86s70-gpio";
		reg = <0 0x31000000 0x10000>;
		gpio-controller;
		#gpio-cells = <2>;
		clocks = <&clk 0 2 1>;
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/fujitsu,mb86s70-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Fujitsu MB86S7x GPIO Controller

maintainers:
  - Jassi Brar <jaswinder.singh@linaro.org>

properties:
  compatible:
    oneOf:
      - items:
          - const: socionext,synquacer-gpio
          - const: fujitsu,mb86s70-gpio
      - const: fujitsu,mb86s70-gpio

  reg:
    maxItems: 1

  '#gpio-cells':
    const: 2

  gpio-controller: true
  gpio-line-names: true

  clocks:
    maxItems: 1

required:
  - compatible
  - reg
  - '#gpio-cells'
  - gpio-controller
  - clocks

additionalProperties: false

examples:
  - |
    gpio@31000000 {
        compatible = "fujitsu,mb86s70-gpio";
        reg = <0x31000000 0x10000>;
        gpio-controller;
        #gpio-cells = <2>;
        clocks = <&clk 0 2 1>;
    };
...
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Spreadtrum EIC controller bindings

The EIC is the abbreviation of external interrupt controller, which can
be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
one is in digital chip, and another one is in PMIC. The digital chip EIC
controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
module.

The EIC-debounce sub-module provides up to 8 source input signal
connections. A debounce mechanism is used to capture the input signals'
stable status (millisecond resolution) and a single-trigger mechanism
is introduced into this sub-module to enhance the input event detection
reliability. In addition, this sub-module's clock can be shut off
automatically to reduce power dissipation. Moreover the debounce range
is from 1ms to 4s with a step size of 1ms. The input signal will be
ignored if it is asserted for less than 1 ms.

The EIC-latch sub-module is used to latch some special power down signals
and generate interrupts, since the EIC-latch does not depend on the APB
clock to capture signals.

The EIC-async sub-module uses a 32kHz clock to capture the short signals
(microsecond resolution) to generate interrupts by level or edge trigger.

The EIC-sync is similar with GPIO's input function, which is a synchronized
signal input register. It can generate interrupts by level or edge trigger
when detecting input signals.

Required properties:
- compatible: Should be one of the following:
  "sprd,sc9860-eic-debounce",
  "sprd,sc9860-eic-latch",
  "sprd,sc9860-eic-async",
  "sprd,sc9860-eic-sync",
  "sprd,sc2731-eic".
- reg: Define the base and range of the I/O address space containing
  the GPIO controller registers.
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells: Should be <2>. The first cell is the gpio number and
  the second cell is used to specify optional parameters.
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells: Should be <2>. Specifies the number of cells needed
  to encode interrupt source.
- interrupts: Should be the port interrupt shared by all the gpios.

Example:
	eic_debounce: gpio@40210000 {
		compatible = "sprd,sc9860-eic-debounce";
		reg = <0 0x40210000 0 0x80>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
	};

	eic_latch: gpio@40210080 {
		compatible = "sprd,sc9860-eic-latch";
		reg = <0 0x40210080 0 0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
	};

	eic_async: gpio@402100a0 {
		compatible = "sprd,sc9860-eic-async";
		reg = <0 0x402100a0 0 0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
	};

	eic_sync: gpio@402100c0 {
		compatible = "sprd,sc9860-eic-sync";
		reg = <0 0x402100c0 0 0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
	};

	pmic_eic: gpio@300 {
		compatible = "sprd,sc2731-eic";
		reg = <0x300>;
		interrupt-parent = <&sc2731_pmic>;
		interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
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Spreadtrum GPIO controller bindings

The controller's registers are organized as sets of sixteen 16-bit
registers with each set controlling a bank of up to 16 pins. A single
interrupt is shared for all of the banks handled by the controller.

Required properties:
- compatible: Should be "sprd,sc9860-gpio".
- reg: Define the base and range of the I/O address space containing
the GPIO controller registers.
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells: Should be <2>. The first cell is the gpio number and
the second cell is used to specify optional parameters.
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells: Should be <2>. Specifies the number of cells needed
to encode interrupt source.
- interrupts: Should be the port interrupt shared by all the gpios.

Example:
	ap_gpio: gpio@40280000 {
		compatible = "sprd,sc9860-gpio";
		reg = <0 0x40280000 0 0x1000>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2022 Unisoc Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Unisoc EIC controller

maintainers:
  - Orson Zhai <orsonzhai@gmail.com>
  - Baolin Wang <baolin.wang7@gmail.com>
  - Chunyan Zhang <zhang.lyra@gmail.com>

description: |
  The EIC is the abbreviation of external interrupt controller, which can
  be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
  one is in digital chip, and another one is in PMIC. The digital chip EIC
  controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
  EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
  module.

  The EIC-debounce sub-module provides up to 8 source input signal
  connections. A debounce mechanism is used to capture the input signals'
  stable status (millisecond resolution) and a single-trigger mechanism
  is introduced into this sub-module to enhance the input event detection
  reliability. In addition, this sub-module's clock can be shut off
  automatically to reduce power dissipation. Moreover the debounce range
  is from 1ms to 4s with a step size of 1ms. The input signal will be
  ignored if it is asserted for less than 1 ms.

  The EIC-latch sub-module is used to latch some special power down signals
  and generate interrupts, since the EIC-latch does not depend on the APB
  clock to capture signals.

  The EIC-async sub-module uses a 32kHz clock to capture the short signals
  (microsecond resolution) to generate interrupts by level or edge trigger.

  The EIC-sync is similar with GPIO's input function, which is a synchronized
  signal input register. It can generate interrupts by level or edge trigger
  when detecting input signals.

properties:
  compatible:
    oneOf:
      - enum:
          - sprd,sc9860-eic-debounce
          - sprd,sc9860-eic-latch
          - sprd,sc9860-eic-async
          - sprd,sc9860-eic-sync
          - sprd,sc2731-eic
      - items:
          - enum:
              - sprd,ums512-eic-debounce
          - const: sprd,sc9860-eic-debounce
      - items:
          - enum:
              - sprd,ums512-eic-latch
          - const: sprd,sc9860-eic-latch
      - items:
          - enum:
              - sprd,ums512-eic-async
          - const: sprd,sc9860-eic-async
      - items:
          - enum:
              - sprd,ums512-eic-sync
          - const: sprd,sc9860-eic-sync
      - items:
          - enum:
              - sprd,sc2730-eic
          - const: sprd,sc2731-eic

  reg:
    minItems: 1
    maxItems: 3
    description:
      EIC controller can support maximum 3 banks which has its own
      address base.

  gpio-controller: true

  "#gpio-cells":
    const: 2

  interrupt-controller: true

  "#interrupt-cells":
    const: 2

  interrupts:
    maxItems: 1
    description:
      The interrupt shared by all GPIO lines for this controller.

required:
  - compatible
  - reg
  - gpio-controller
  - "#gpio-cells"
  - interrupt-controller
  - "#interrupt-cells"
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        eic_debounce: gpio@40210000 {
            compatible = "sprd,sc9860-eic-debounce";
            reg = <0 0x40210000 0 0x80>;
            gpio-controller;
            #gpio-cells = <2>;
            interrupt-controller;
            #interrupt-cells = <2>;
            interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
        };
    };
...
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