Commit 17749ece authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/adlp/fb: Remove restriction on semiplanar UV plane offset 



Since the surfaces of tiled FBs on ADLP are remapped it's pointless to
require an alignment in the allocated object. The necessary tile-row
alignment (to be programmed to the surface start register) will be
ensured later when flipping to the FB.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJuha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211026225105.2783797-7-imre.deak@intel.com
parent be6c1dd5

drivers/gpu/drm/i915/display/intel_fb.c

+1 −0
Original line number Diff line number Diff line
@@ -1018,6 +1018,7 @@ static int intel_fb_offset_to_xy(int *x, int *y, 
	u32 alignment;



	if (DISPLAY_VER(i915) >= 12 &&

	    !intel_fb_needs_pot_stride_remap(to_intel_framebuffer(fb)) &&

	    is_semiplanar_uv_plane(fb, color_plane))

		alignment = intel_tile_row_size(fb, color_plane);

	else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)