Commit 176435ad authored by Horia Geantă's avatar Horia Geantă Committed by Herbert Xu
Browse files

crypto: caam - defer probing until QMan is available 



When QI (Queue Interface) support is enabled on DPAA 1.x platforms,
defer probing if dependencies (QMan drivers) are not available yet.

Signed-off-by: default avatarHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 2ef54047

drivers/crypto/caam/ctrl.c

+48 −26
Original line number Diff line number Diff line
@@ -527,15 +527,54 @@ static int caam_probe(struct platform_device *pdev) 
	dev_set_drvdata(dev, ctrlpriv);

	nprop = pdev->dev.of_node;



	/* Get configuration properties from device tree */

	/* First, get register page */

	ctrl = of_iomap(nprop, 0);

	if (!ctrl) {

		dev_err(dev, "caam: of_iomap() failed\n");

		return -ENOMEM;

	}



	caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &

				  (CSTA_PLEND | CSTA_ALT_PLEND));

	caam_imx = (bool)soc_device_match(imx_soc);



	comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);

	caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);

	ctrlpriv->qi_present = !!(comp_params & CTPR_MS_QI_MASK);



#ifdef CONFIG_CAAM_QI

	/* If (DPAA 1.x) QI present, check whether dependencies are available */

	if (ctrlpriv->qi_present && !caam_dpaa2) {

		ret = qman_is_probed();

		if (!ret) {

			ret = -EPROBE_DEFER;

			goto iounmap_ctrl;

		} else if (ret < 0) {

			dev_err(dev, "failing probe due to qman probe error\n");

			ret = -ENODEV;

			goto iounmap_ctrl;

		}



		ret = qman_portals_probed();

		if (!ret) {

			ret = -EPROBE_DEFER;

			goto iounmap_ctrl;

		} else if (ret < 0) {

			dev_err(dev, "failing probe due to qman portals probe error\n");

			ret = -ENODEV;

			goto iounmap_ctrl;

		}

	}

#endif



	/* Enable clocking */

	clk = caam_drv_identify_clk(&pdev->dev, "ipg");

	if (IS_ERR(clk)) {

		ret = PTR_ERR(clk);

		dev_err(&pdev->dev,

			"can't identify CAAM ipg clk: %d\n", ret);

		return ret;

		goto iounmap_ctrl;

	}

	ctrlpriv->caam_ipg = clk;
@@ -547,7 +586,7 @@ static int caam_probe(struct platform_device *pdev) 
			ret = PTR_ERR(clk);

			dev_err(&pdev->dev,

				"can't identify CAAM mem clk: %d\n", ret);

			return ret;

			goto iounmap_ctrl;

		}

		ctrlpriv->caam_mem = clk;

	}
@@ -557,7 +596,7 @@ static int caam_probe(struct platform_device *pdev) 
		ret = PTR_ERR(clk);

		dev_err(&pdev->dev,

			"can't identify CAAM aclk clk: %d\n", ret);

		return ret;

		goto iounmap_ctrl;

	}

	ctrlpriv->caam_aclk = clk;
@@ -570,7 +609,7 @@ static int caam_probe(struct platform_device *pdev) 
			ret = PTR_ERR(clk);

			dev_err(&pdev->dev,

				"can't identify CAAM emi_slow clk: %d\n", ret);

			return ret;

			goto iounmap_ctrl;

		}

		ctrlpriv->caam_emi_slow = clk;

	}
@@ -578,7 +617,7 @@ static int caam_probe(struct platform_device *pdev) 
	ret = clk_prepare_enable(ctrlpriv->caam_ipg);

	if (ret < 0) {

		dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);

		return ret;

		goto iounmap_ctrl;

	}



	if (ctrlpriv->caam_mem) {
@@ -605,25 +644,10 @@ static int caam_probe(struct platform_device *pdev) 
		}

	}



	/* Get configuration properties from device tree */

	/* First, get register page */

	ctrl = of_iomap(nprop, 0);

	if (ctrl == NULL) {

		dev_err(dev, "caam: of_iomap() failed\n");

		ret = -ENOMEM;

		goto disable_caam_emi_slow;

	}



	caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &

				  (CSTA_PLEND | CSTA_ALT_PLEND));



	/* Finding the page size for using the CTPR_MS register */

	comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);

	pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;



	/* Allocating the BLOCK_OFFSET based on the supported page size on

	 * the platform

	 */

	pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;

	if (pg_size == 0)

		BLOCK_OFFSET = PG_SIZE_4K;

	else
@@ -648,7 +672,6 @@ static int caam_probe(struct platform_device *pdev) 
	 * In case of SoCs with Management Complex, MC f/w performs

	 * the configuration.

	 */

	caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);

	np = of_find_compatible_node(NULL, NULL, "fsl,qoriq-mc");

	ctrlpriv->mc_en = !!np;

	of_node_put(np);
@@ -700,7 +723,7 @@ static int caam_probe(struct platform_device *pdev) 
	}

	if (ret) {

		dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret);

		goto iounmap_ctrl;

		goto disable_caam_emi_slow;

	}



	ctrlpriv->era = caam_get_era(ctrl);
@@ -719,7 +742,6 @@ static int caam_probe(struct platform_device *pdev) 
#endif



	/* Check to see if (DPAA 1.x) QI present. If so, enable */

	ctrlpriv->qi_present = !!(comp_params & CTPR_MS_QI_MASK);

	if (ctrlpriv->qi_present && !caam_dpaa2) {

		ctrlpriv->qi = (struct caam_queue_if __iomem __force *)

			       ((__force uint8_t *)ctrl +
@@ -906,8 +928,6 @@ static int caam_probe(struct platform_device *pdev) 
	if (ctrlpriv->qi_init)

		caam_qi_shutdown(dev);

#endif

iounmap_ctrl:

	iounmap(ctrl);

disable_caam_emi_slow:

	if (ctrlpriv->caam_emi_slow)

		clk_disable_unprepare(ctrlpriv->caam_emi_slow);
@@ -918,6 +938,8 @@ static int caam_probe(struct platform_device *pdev) 
		clk_disable_unprepare(ctrlpriv->caam_mem);

disable_caam_ipg:

	clk_disable_unprepare(ctrlpriv->caam_ipg);

iounmap_ctrl:

	iounmap(ctrl);

	return ret;

}