Loading include/sound/dmaengine_pcm.h +11 −0 Original line number Diff line number Diff line Loading @@ -161,4 +161,15 @@ int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, #define SND_DMAENGINE_PCM_DRV_NAME "snd_dmaengine_pcm" struct dmaengine_pcm { struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1]; const struct snd_dmaengine_pcm_config *config; struct snd_soc_component component; unsigned int flags; }; static inline struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p) { return container_of(p, struct dmaengine_pcm, component); } #endif include/sound/soc.h +6 −0 Original line number Diff line number Diff line Loading @@ -444,6 +444,8 @@ int devm_snd_soc_register_component(struct device *dev, const struct snd_soc_component_driver *component_driver, struct snd_soc_dai_driver *dai_drv, int num_dai); void snd_soc_unregister_component(struct device *dev); struct snd_soc_component *snd_soc_lookup_component_nolocked(struct device *dev, const char *driver_name); struct snd_soc_component *snd_soc_lookup_component(struct device *dev, const char *driver_name); Loading Loading @@ -1361,6 +1363,10 @@ void snd_soc_remove_pcm_runtime(struct snd_soc_card *card, struct snd_soc_dai *snd_soc_register_dai(struct snd_soc_component *component, struct snd_soc_dai_driver *dai_drv, bool legacy_dai_naming); struct snd_soc_dai *devm_snd_soc_register_dai(struct device *dev, struct snd_soc_component *component, struct snd_soc_dai_driver *dai_drv, bool legacy_dai_naming); void snd_soc_unregister_dai(struct snd_soc_dai *dai); struct snd_soc_dai *snd_soc_find_dai( Loading sound/soc/codecs/max98390.c +3 −3 Original line number Diff line number Diff line Loading @@ -700,8 +700,8 @@ static bool max98390_readable_register(struct device *dev, unsigned int reg) case MAX98390_IRQ_CTRL ... MAX98390_WDOG_CTRL: case MAX98390_MEAS_ADC_THERM_WARN_THRESH ... MAX98390_BROWNOUT_INFINITE_HOLD: case MAX98390_BROWNOUT_LVL_HOLD ... THERMAL_COILTEMP_RD_BACK_BYTE0: case DSMIG_DEBUZZER_THRESHOLD ... MAX98390_R24FF_REV_ID: case MAX98390_BROWNOUT_LVL_HOLD ... DSMIG_DEBUZZER_THRESHOLD: case DSM_VOL_ENA ... MAX98390_R24FF_REV_ID: return true; default: return false; Loading @@ -717,7 +717,7 @@ static bool max98390_volatile_reg(struct device *dev, unsigned int reg) case MAX98390_BROWNOUT_LOWEST_STATUS: case MAX98390_ENV_TRACK_BOOST_VOUT_READ: case DSM_STBASS_HPF_B0_BYTE0 ... DSM_DEBUZZER_ATTACK_TIME_BYTE2: case THERMAL_RDC_RD_BACK_BYTE1 ... THERMAL_COILTEMP_RD_BACK_BYTE0: case THERMAL_RDC_RD_BACK_BYTE1 ... DSMIG_DEBUZZER_THRESHOLD: case DSM_THERMAL_GAIN ... DSM_WBDRC_GAIN: return true; default: Loading sound/soc/codecs/rt1015.c +75 −49 Original line number Diff line number Diff line Loading @@ -34,30 +34,32 @@ static const struct reg_default rt1015_reg[] = { { 0x0000, 0x0000 }, { 0x0004, 0xa000 }, { 0x0006, 0x0003 }, { 0x000a, 0x0802 }, { 0x000c, 0x0020 }, { 0x000a, 0x081e }, { 0x000c, 0x0006 }, { 0x000e, 0x0000 }, { 0x0010, 0x0000 }, { 0x0012, 0x0000 }, { 0x0014, 0x0000 }, { 0x0016, 0x0000 }, { 0x0018, 0x0000 }, { 0x0020, 0x8000 }, { 0x0022, 0x471b }, { 0x006a, 0x0000 }, { 0x006c, 0x4020 }, { 0x0022, 0x8043 }, { 0x0076, 0x0000 }, { 0x0078, 0x0000 }, { 0x007a, 0x0000 }, { 0x007a, 0x0002 }, { 0x007c, 0x10ec }, { 0x007d, 0x1015 }, { 0x00f0, 0x5000 }, { 0x00f2, 0x0774 }, { 0x00f3, 0x8400 }, { 0x00f2, 0x004c }, { 0x00f3, 0xecfe }, { 0x00f4, 0x0000 }, { 0x00f6, 0x0400 }, { 0x0100, 0x0028 }, { 0x0102, 0xff02 }, { 0x0104, 0x8232 }, { 0x0104, 0xa213 }, { 0x0106, 0x200c }, { 0x010c, 0x002f }, { 0x010e, 0xc000 }, { 0x010c, 0x0000 }, { 0x010e, 0x0058 }, { 0x0111, 0x0200 }, { 0x0112, 0x0400 }, { 0x0114, 0x0022 }, Loading @@ -65,38 +67,46 @@ static const struct reg_default rt1015_reg[] = { { 0x0118, 0x0000 }, { 0x011a, 0x0123 }, { 0x011c, 0x4567 }, { 0x0300, 0xdddd }, { 0x0302, 0x0000 }, { 0x0311, 0x9330 }, { 0x0313, 0x0000 }, { 0x0314, 0x0000 }, { 0x0300, 0x203d }, { 0x0302, 0x001e }, { 0x0311, 0x0000 }, { 0x0313, 0x6014 }, { 0x0314, 0x00a2 }, { 0x031a, 0x00a0 }, { 0x031c, 0x001f }, { 0x031d, 0xffff }, { 0x031e, 0x0000 }, { 0x031f, 0x0000 }, { 0x0320, 0x0000 }, { 0x0321, 0x0000 }, { 0x0322, 0x0000 }, { 0x0328, 0x0000 }, { 0x0329, 0x0000 }, { 0x032a, 0x0000 }, { 0x032b, 0x0000 }, { 0x032c, 0x0000 }, { 0x032d, 0x0000 }, { 0x032e, 0x030e }, { 0x0330, 0x0080 }, { 0x0322, 0xd7df }, { 0x0328, 0x10b2 }, { 0x0329, 0x0175 }, { 0x032a, 0x36ad }, { 0x032b, 0x7e55 }, { 0x032c, 0x0520 }, { 0x032d, 0xaa00 }, { 0x032e, 0x570e }, { 0x0330, 0xe180 }, { 0x0332, 0x0034 }, { 0x0334, 0x0000 }, { 0x0336, 0x0000 }, { 0x0334, 0x0001 }, { 0x0336, 0x0010 }, { 0x0338, 0x0000 }, { 0x04fa, 0x0030 }, { 0x04fc, 0x35c8 }, { 0x04fe, 0x0800 }, { 0x0500, 0x0400 }, { 0x0502, 0x1000 }, { 0x0504, 0x0000 }, { 0x0506, 0x04ff }, { 0x0508, 0x0030 }, { 0x050a, 0x0018 }, { 0x0519, 0x307f }, { 0x051a, 0xffff }, { 0x051b, 0x4000 }, { 0x0508, 0x0010 }, { 0x050a, 0x001a }, { 0x0519, 0x1c68 }, { 0x051a, 0x0ccc }, { 0x051b, 0x0666 }, { 0x051d, 0x0000 }, { 0x051f, 0x0000 }, { 0x0536, 0x1000 }, { 0x0536, 0x061c }, { 0x0538, 0x0000 }, { 0x053a, 0x0000 }, { 0x053c, 0x0000 }, Loading @@ -110,19 +120,18 @@ static const struct reg_default rt1015_reg[] = { { 0x0544, 0x0000 }, { 0x0568, 0x0000 }, { 0x056a, 0x0000 }, { 0x1000, 0x0000 }, { 0x1002, 0x6505 }, { 0x1000, 0x0040 }, { 0x1002, 0x5405 }, { 0x1006, 0x5515 }, { 0x1007, 0x003f }, { 0x1009, 0x770f }, { 0x100a, 0x01ff }, { 0x100c, 0x0000 }, { 0x1007, 0x05f7 }, { 0x1009, 0x0b0a }, { 0x100a, 0x00ef }, { 0x100d, 0x0003 }, { 0x1010, 0xa433 }, { 0x1020, 0x0000 }, { 0x1200, 0x3d02 }, { 0x1202, 0x0813 }, { 0x1204, 0x0211 }, { 0x1200, 0x5a01 }, { 0x1202, 0x6524 }, { 0x1204, 0x1f00 }, { 0x1206, 0x0000 }, { 0x1208, 0x0000 }, { 0x120a, 0x0000 }, Loading @@ -130,16 +139,16 @@ static const struct reg_default rt1015_reg[] = { { 0x120e, 0x0000 }, { 0x1210, 0x0000 }, { 0x1212, 0x0000 }, { 0x1300, 0x0701 }, { 0x1302, 0x12f9 }, { 0x1304, 0x3405 }, { 0x1300, 0x10a1 }, { 0x1302, 0x12ff }, { 0x1304, 0x0400 }, { 0x1305, 0x0844 }, { 0x1306, 0x1611 }, { 0x1306, 0x4611 }, { 0x1308, 0x555e }, { 0x130a, 0x0000 }, { 0x130c, 0x2400}, { 0x130e, 0x7700 }, { 0x130f, 0x0000 }, { 0x130c, 0x2000 }, { 0x130e, 0x0100 }, { 0x130f, 0x0001 }, { 0x1310, 0x0000 }, { 0x1312, 0x0000 }, { 0x1314, 0x0000 }, Loading Loading @@ -209,6 +218,9 @@ static bool rt1015_volatile_register(struct device *dev, unsigned int reg) case RT1015_DC_CALIB_CLSD7: case RT1015_DC_CALIB_CLSD8: case RT1015_S_BST_TIMING_INTER1: case RT1015_OSCK_STA: case RT1015_MONO_DYNA_CTRL1: case RT1015_MONO_DYNA_CTRL5: return true; default: Loading @@ -224,6 +236,12 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_CLK3: case RT1015_PLL1: case RT1015_PLL2: case RT1015_DUM_RW1: case RT1015_DUM_RW2: case RT1015_DUM_RW3: case RT1015_DUM_RW4: case RT1015_DUM_RW5: case RT1015_DUM_RW6: case RT1015_CLK_DET: case RT1015_SIL_DET: case RT1015_CUSTOMER_ID: Loading @@ -235,6 +253,7 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_PAD_DRV2: case RT1015_GAT_BOOST: case RT1015_PRO_ALT: case RT1015_OSCK_STA: case RT1015_MAN_I2C: case RT1015_DAC1: case RT1015_DAC2: Loading Loading @@ -272,6 +291,13 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_SMART_BST_CTRL2: case RT1015_ANA_CTRL1: case RT1015_ANA_CTRL2: case RT1015_PWR_STATE_CTRL: case RT1015_MONO_DYNA_CTRL: case RT1015_MONO_DYNA_CTRL1: case RT1015_MONO_DYNA_CTRL2: case RT1015_MONO_DYNA_CTRL3: case RT1015_MONO_DYNA_CTRL4: case RT1015_MONO_DYNA_CTRL5: case RT1015_SPK_VOL: case RT1015_SHORT_DETTOP1: case RT1015_SHORT_DETTOP2: Loading sound/soc/codecs/rt1015.h +14 −1 Original line number Diff line number Diff line Loading @@ -21,6 +21,12 @@ #define RT1015_CLK3 0x0006 #define RT1015_PLL1 0x000a #define RT1015_PLL2 0x000c #define RT1015_DUM_RW1 0x000e #define RT1015_DUM_RW2 0x0010 #define RT1015_DUM_RW3 0x0012 #define RT1015_DUM_RW4 0x0014 #define RT1015_DUM_RW5 0x0016 #define RT1015_DUM_RW6 0x0018 #define RT1015_CLK_DET 0x0020 #define RT1015_SIL_DET 0x0022 #define RT1015_CUSTOMER_ID 0x0076 Loading @@ -32,6 +38,7 @@ #define RT1015_PAD_DRV2 0x00f2 #define RT1015_GAT_BOOST 0x00f3 #define RT1015_PRO_ALT 0x00f4 #define RT1015_OSCK_STA 0x00f6 #define RT1015_MAN_I2C 0x0100 #define RT1015_DAC1 0x0102 #define RT1015_DAC2 0x0104 Loading Loading @@ -70,6 +77,12 @@ #define RT1015_ANA_CTRL1 0x0334 #define RT1015_ANA_CTRL2 0x0336 #define RT1015_PWR_STATE_CTRL 0x0338 #define RT1015_MONO_DYNA_CTRL 0x04fa #define RT1015_MONO_DYNA_CTRL1 0x04fc #define RT1015_MONO_DYNA_CTRL2 0x04fe #define RT1015_MONO_DYNA_CTRL3 0x0500 #define RT1015_MONO_DYNA_CTRL4 0x0502 #define RT1015_MONO_DYNA_CTRL5 0x0504 #define RT1015_SPK_VOL 0x0506 #define RT1015_SHORT_DETTOP1 0x0508 #define RT1015_SHORT_DETTOP2 0x050a Loading Loading
include/sound/dmaengine_pcm.h +11 −0 Original line number Diff line number Diff line Loading @@ -161,4 +161,15 @@ int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, #define SND_DMAENGINE_PCM_DRV_NAME "snd_dmaengine_pcm" struct dmaengine_pcm { struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1]; const struct snd_dmaengine_pcm_config *config; struct snd_soc_component component; unsigned int flags; }; static inline struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p) { return container_of(p, struct dmaengine_pcm, component); } #endif
include/sound/soc.h +6 −0 Original line number Diff line number Diff line Loading @@ -444,6 +444,8 @@ int devm_snd_soc_register_component(struct device *dev, const struct snd_soc_component_driver *component_driver, struct snd_soc_dai_driver *dai_drv, int num_dai); void snd_soc_unregister_component(struct device *dev); struct snd_soc_component *snd_soc_lookup_component_nolocked(struct device *dev, const char *driver_name); struct snd_soc_component *snd_soc_lookup_component(struct device *dev, const char *driver_name); Loading Loading @@ -1361,6 +1363,10 @@ void snd_soc_remove_pcm_runtime(struct snd_soc_card *card, struct snd_soc_dai *snd_soc_register_dai(struct snd_soc_component *component, struct snd_soc_dai_driver *dai_drv, bool legacy_dai_naming); struct snd_soc_dai *devm_snd_soc_register_dai(struct device *dev, struct snd_soc_component *component, struct snd_soc_dai_driver *dai_drv, bool legacy_dai_naming); void snd_soc_unregister_dai(struct snd_soc_dai *dai); struct snd_soc_dai *snd_soc_find_dai( Loading
sound/soc/codecs/max98390.c +3 −3 Original line number Diff line number Diff line Loading @@ -700,8 +700,8 @@ static bool max98390_readable_register(struct device *dev, unsigned int reg) case MAX98390_IRQ_CTRL ... MAX98390_WDOG_CTRL: case MAX98390_MEAS_ADC_THERM_WARN_THRESH ... MAX98390_BROWNOUT_INFINITE_HOLD: case MAX98390_BROWNOUT_LVL_HOLD ... THERMAL_COILTEMP_RD_BACK_BYTE0: case DSMIG_DEBUZZER_THRESHOLD ... MAX98390_R24FF_REV_ID: case MAX98390_BROWNOUT_LVL_HOLD ... DSMIG_DEBUZZER_THRESHOLD: case DSM_VOL_ENA ... MAX98390_R24FF_REV_ID: return true; default: return false; Loading @@ -717,7 +717,7 @@ static bool max98390_volatile_reg(struct device *dev, unsigned int reg) case MAX98390_BROWNOUT_LOWEST_STATUS: case MAX98390_ENV_TRACK_BOOST_VOUT_READ: case DSM_STBASS_HPF_B0_BYTE0 ... DSM_DEBUZZER_ATTACK_TIME_BYTE2: case THERMAL_RDC_RD_BACK_BYTE1 ... THERMAL_COILTEMP_RD_BACK_BYTE0: case THERMAL_RDC_RD_BACK_BYTE1 ... DSMIG_DEBUZZER_THRESHOLD: case DSM_THERMAL_GAIN ... DSM_WBDRC_GAIN: return true; default: Loading
sound/soc/codecs/rt1015.c +75 −49 Original line number Diff line number Diff line Loading @@ -34,30 +34,32 @@ static const struct reg_default rt1015_reg[] = { { 0x0000, 0x0000 }, { 0x0004, 0xa000 }, { 0x0006, 0x0003 }, { 0x000a, 0x0802 }, { 0x000c, 0x0020 }, { 0x000a, 0x081e }, { 0x000c, 0x0006 }, { 0x000e, 0x0000 }, { 0x0010, 0x0000 }, { 0x0012, 0x0000 }, { 0x0014, 0x0000 }, { 0x0016, 0x0000 }, { 0x0018, 0x0000 }, { 0x0020, 0x8000 }, { 0x0022, 0x471b }, { 0x006a, 0x0000 }, { 0x006c, 0x4020 }, { 0x0022, 0x8043 }, { 0x0076, 0x0000 }, { 0x0078, 0x0000 }, { 0x007a, 0x0000 }, { 0x007a, 0x0002 }, { 0x007c, 0x10ec }, { 0x007d, 0x1015 }, { 0x00f0, 0x5000 }, { 0x00f2, 0x0774 }, { 0x00f3, 0x8400 }, { 0x00f2, 0x004c }, { 0x00f3, 0xecfe }, { 0x00f4, 0x0000 }, { 0x00f6, 0x0400 }, { 0x0100, 0x0028 }, { 0x0102, 0xff02 }, { 0x0104, 0x8232 }, { 0x0104, 0xa213 }, { 0x0106, 0x200c }, { 0x010c, 0x002f }, { 0x010e, 0xc000 }, { 0x010c, 0x0000 }, { 0x010e, 0x0058 }, { 0x0111, 0x0200 }, { 0x0112, 0x0400 }, { 0x0114, 0x0022 }, Loading @@ -65,38 +67,46 @@ static const struct reg_default rt1015_reg[] = { { 0x0118, 0x0000 }, { 0x011a, 0x0123 }, { 0x011c, 0x4567 }, { 0x0300, 0xdddd }, { 0x0302, 0x0000 }, { 0x0311, 0x9330 }, { 0x0313, 0x0000 }, { 0x0314, 0x0000 }, { 0x0300, 0x203d }, { 0x0302, 0x001e }, { 0x0311, 0x0000 }, { 0x0313, 0x6014 }, { 0x0314, 0x00a2 }, { 0x031a, 0x00a0 }, { 0x031c, 0x001f }, { 0x031d, 0xffff }, { 0x031e, 0x0000 }, { 0x031f, 0x0000 }, { 0x0320, 0x0000 }, { 0x0321, 0x0000 }, { 0x0322, 0x0000 }, { 0x0328, 0x0000 }, { 0x0329, 0x0000 }, { 0x032a, 0x0000 }, { 0x032b, 0x0000 }, { 0x032c, 0x0000 }, { 0x032d, 0x0000 }, { 0x032e, 0x030e }, { 0x0330, 0x0080 }, { 0x0322, 0xd7df }, { 0x0328, 0x10b2 }, { 0x0329, 0x0175 }, { 0x032a, 0x36ad }, { 0x032b, 0x7e55 }, { 0x032c, 0x0520 }, { 0x032d, 0xaa00 }, { 0x032e, 0x570e }, { 0x0330, 0xe180 }, { 0x0332, 0x0034 }, { 0x0334, 0x0000 }, { 0x0336, 0x0000 }, { 0x0334, 0x0001 }, { 0x0336, 0x0010 }, { 0x0338, 0x0000 }, { 0x04fa, 0x0030 }, { 0x04fc, 0x35c8 }, { 0x04fe, 0x0800 }, { 0x0500, 0x0400 }, { 0x0502, 0x1000 }, { 0x0504, 0x0000 }, { 0x0506, 0x04ff }, { 0x0508, 0x0030 }, { 0x050a, 0x0018 }, { 0x0519, 0x307f }, { 0x051a, 0xffff }, { 0x051b, 0x4000 }, { 0x0508, 0x0010 }, { 0x050a, 0x001a }, { 0x0519, 0x1c68 }, { 0x051a, 0x0ccc }, { 0x051b, 0x0666 }, { 0x051d, 0x0000 }, { 0x051f, 0x0000 }, { 0x0536, 0x1000 }, { 0x0536, 0x061c }, { 0x0538, 0x0000 }, { 0x053a, 0x0000 }, { 0x053c, 0x0000 }, Loading @@ -110,19 +120,18 @@ static const struct reg_default rt1015_reg[] = { { 0x0544, 0x0000 }, { 0x0568, 0x0000 }, { 0x056a, 0x0000 }, { 0x1000, 0x0000 }, { 0x1002, 0x6505 }, { 0x1000, 0x0040 }, { 0x1002, 0x5405 }, { 0x1006, 0x5515 }, { 0x1007, 0x003f }, { 0x1009, 0x770f }, { 0x100a, 0x01ff }, { 0x100c, 0x0000 }, { 0x1007, 0x05f7 }, { 0x1009, 0x0b0a }, { 0x100a, 0x00ef }, { 0x100d, 0x0003 }, { 0x1010, 0xa433 }, { 0x1020, 0x0000 }, { 0x1200, 0x3d02 }, { 0x1202, 0x0813 }, { 0x1204, 0x0211 }, { 0x1200, 0x5a01 }, { 0x1202, 0x6524 }, { 0x1204, 0x1f00 }, { 0x1206, 0x0000 }, { 0x1208, 0x0000 }, { 0x120a, 0x0000 }, Loading @@ -130,16 +139,16 @@ static const struct reg_default rt1015_reg[] = { { 0x120e, 0x0000 }, { 0x1210, 0x0000 }, { 0x1212, 0x0000 }, { 0x1300, 0x0701 }, { 0x1302, 0x12f9 }, { 0x1304, 0x3405 }, { 0x1300, 0x10a1 }, { 0x1302, 0x12ff }, { 0x1304, 0x0400 }, { 0x1305, 0x0844 }, { 0x1306, 0x1611 }, { 0x1306, 0x4611 }, { 0x1308, 0x555e }, { 0x130a, 0x0000 }, { 0x130c, 0x2400}, { 0x130e, 0x7700 }, { 0x130f, 0x0000 }, { 0x130c, 0x2000 }, { 0x130e, 0x0100 }, { 0x130f, 0x0001 }, { 0x1310, 0x0000 }, { 0x1312, 0x0000 }, { 0x1314, 0x0000 }, Loading Loading @@ -209,6 +218,9 @@ static bool rt1015_volatile_register(struct device *dev, unsigned int reg) case RT1015_DC_CALIB_CLSD7: case RT1015_DC_CALIB_CLSD8: case RT1015_S_BST_TIMING_INTER1: case RT1015_OSCK_STA: case RT1015_MONO_DYNA_CTRL1: case RT1015_MONO_DYNA_CTRL5: return true; default: Loading @@ -224,6 +236,12 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_CLK3: case RT1015_PLL1: case RT1015_PLL2: case RT1015_DUM_RW1: case RT1015_DUM_RW2: case RT1015_DUM_RW3: case RT1015_DUM_RW4: case RT1015_DUM_RW5: case RT1015_DUM_RW6: case RT1015_CLK_DET: case RT1015_SIL_DET: case RT1015_CUSTOMER_ID: Loading @@ -235,6 +253,7 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_PAD_DRV2: case RT1015_GAT_BOOST: case RT1015_PRO_ALT: case RT1015_OSCK_STA: case RT1015_MAN_I2C: case RT1015_DAC1: case RT1015_DAC2: Loading Loading @@ -272,6 +291,13 @@ static bool rt1015_readable_register(struct device *dev, unsigned int reg) case RT1015_SMART_BST_CTRL2: case RT1015_ANA_CTRL1: case RT1015_ANA_CTRL2: case RT1015_PWR_STATE_CTRL: case RT1015_MONO_DYNA_CTRL: case RT1015_MONO_DYNA_CTRL1: case RT1015_MONO_DYNA_CTRL2: case RT1015_MONO_DYNA_CTRL3: case RT1015_MONO_DYNA_CTRL4: case RT1015_MONO_DYNA_CTRL5: case RT1015_SPK_VOL: case RT1015_SHORT_DETTOP1: case RT1015_SHORT_DETTOP2: Loading
sound/soc/codecs/rt1015.h +14 −1 Original line number Diff line number Diff line Loading @@ -21,6 +21,12 @@ #define RT1015_CLK3 0x0006 #define RT1015_PLL1 0x000a #define RT1015_PLL2 0x000c #define RT1015_DUM_RW1 0x000e #define RT1015_DUM_RW2 0x0010 #define RT1015_DUM_RW3 0x0012 #define RT1015_DUM_RW4 0x0014 #define RT1015_DUM_RW5 0x0016 #define RT1015_DUM_RW6 0x0018 #define RT1015_CLK_DET 0x0020 #define RT1015_SIL_DET 0x0022 #define RT1015_CUSTOMER_ID 0x0076 Loading @@ -32,6 +38,7 @@ #define RT1015_PAD_DRV2 0x00f2 #define RT1015_GAT_BOOST 0x00f3 #define RT1015_PRO_ALT 0x00f4 #define RT1015_OSCK_STA 0x00f6 #define RT1015_MAN_I2C 0x0100 #define RT1015_DAC1 0x0102 #define RT1015_DAC2 0x0104 Loading Loading @@ -70,6 +77,12 @@ #define RT1015_ANA_CTRL1 0x0334 #define RT1015_ANA_CTRL2 0x0336 #define RT1015_PWR_STATE_CTRL 0x0338 #define RT1015_MONO_DYNA_CTRL 0x04fa #define RT1015_MONO_DYNA_CTRL1 0x04fc #define RT1015_MONO_DYNA_CTRL2 0x04fe #define RT1015_MONO_DYNA_CTRL3 0x0500 #define RT1015_MONO_DYNA_CTRL4 0x0502 #define RT1015_MONO_DYNA_CTRL5 0x0504 #define RT1015_SPK_VOL 0x0506 #define RT1015_SHORT_DETTOP1 0x0508 #define RT1015_SHORT_DETTOP2 0x050a Loading