Loading drivers/gpio/gpio-zynq.c +9 −8 Original line number Diff line number Diff line Loading @@ -511,13 +511,14 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type) writel_relaxed(int_any, gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); if (type & IRQ_TYPE_LEVEL_MASK) { if (type & IRQ_TYPE_LEVEL_MASK) irq_set_chip_handler_name_locked(irq_data, &zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL); } else { &zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL); else irq_set_chip_handler_name_locked(irq_data, &zynq_gpio_edge_irqchip, handle_level_irq, NULL); } &zynq_gpio_edge_irqchip, handle_level_irq, NULL); return 0; } Loading Loading
drivers/gpio/gpio-zynq.c +9 −8 Original line number Diff line number Diff line Loading @@ -511,13 +511,14 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type) writel_relaxed(int_any, gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); if (type & IRQ_TYPE_LEVEL_MASK) { if (type & IRQ_TYPE_LEVEL_MASK) irq_set_chip_handler_name_locked(irq_data, &zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL); } else { &zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL); else irq_set_chip_handler_name_locked(irq_data, &zynq_gpio_edge_irqchip, handle_level_irq, NULL); } &zynq_gpio_edge_irqchip, handle_level_irq, NULL); return 0; } Loading