Commit 16b58423 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 6.4-rc5 into driver-core-next



We need the driver core fixes in here as well.

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parents 7810f4dc 9561de3a
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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Lattice Slave SPI sysCONFIG FPGA manager

maintainers:
  - Ivan Bornyakov <i.bornyakov@metrotek.ru>
  - Vladimir Georgiev <v.georgiev@metrotek.ru>

description: |
  Lattice sysCONFIG port, which is used for FPGA configuration, among others,
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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip Polarfire FPGA manager.

maintainers:
  - Ivan Bornyakov <i.bornyakov@metrotek.ru>
  - Vladimir Georgiev <v.georgiev@metrotek.ru>

description:
  Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to
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@@ -39,6 +39,12 @@ properties:
  power-domains:
    maxItems: 1

  vref-supply:
    description: |
      External ADC reference voltage supply on VREFH pad. If VERID[MVI] is
      set, there are additional, internal reference voltages selectable.
      VREFH1 is always from VREFH pad.

  "#io-channel-cells":
    const: 1

@@ -72,6 +78,7 @@ examples:
            assigned-clocks = <&clk IMX_SC_R_ADC_0>;
            assigned-clock-rates = <24000000>;
            power-domains = <&pd IMX_SC_R_ADC_0>;
            vref-supply = <&reg_1v8>;
            #io-channel-cells = <1>;
        };
    };
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@@ -90,7 +90,7 @@ patternProperties:
            of the MAX chips to the GyroADC, while MISO line of each Maxim
            ADC connects to a shared input pin of the GyroADC.
        enum:
          - adi,7476
          - adi,ad7476
          - fujitsu,mb88101a
          - maxim,max1162
          - maxim,max11100
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@@ -70,6 +70,7 @@ properties:
  dsr-gpios: true
  rng-gpios: true
  dcd-gpios: true
  rs485-rts-active-high: true
  rts-gpio: true
  power-domains: true
  clock-frequency: true
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