Commit 1654e95e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_urgent_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Borislav Petkov:

 - Add the model number of a new, Raptor Lake CPU, to intel-family.h

 - Do not log spurious corrected MCEs on SKL too, due to an erratum

 - Clarify the path of paravirt ops patches upstream

 - Add an optimization to avoid writing out AMX components to sigframes
   when former are in init state

* tag 'x86_urgent_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Add Raptor Lake to Intel family
  x86/mce: Add errata workaround for Skylake SKX37
  MAINTAINERS: Add some information to PARAVIRT_OPS entry
  x86/fpu: Optimize out sigframe xfeatures when in init state
parents 35c8fad4 fbdb5e8f

Documentation/x86/xstate.rst

+9 −0
Original line number Diff line number Diff line
@@ -63,3 +63,12 @@ kernel sends SIGILL to the application. If the process has permission then 
the handler allocates a larger xstate buffer for the task so the large

state can be context switched. In the unlikely cases that the allocation

fails, the kernel sends SIGSEGV.



Dynamic features in signal frames

---------------------------------



Dynamcally enabled features are not written to the signal frame upon signal

entry if the feature is in its initial configuration.  This differs from

non-dynamic features which are always written regardless of their

configuration.  Signal handlers can examine the XSAVE buffer's XSTATE_BV

field to determine if a features was written.

MAINTAINERS

+2 −0
Original line number Diff line number Diff line
@@ -14412,7 +14412,9 @@ M: Juergen Gross <jgross@suse.com> 
M:	Deep Shah <sdeep@vmware.com>

M:	"VMware, Inc." <pv-drivers@vmware.com>

L:	virtualization@lists.linux-foundation.org

L:	x86@kernel.org

S:	Supported

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core

F:	Documentation/virt/paravirt_ops.rst

F:	arch/*/include/asm/paravirt*.h

F:	arch/*/kernel/paravirt*

arch/x86/include/asm/fpu/xcr.h

+12 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
#define _ASM_X86_FPU_XCR_H



#define XCR_XFEATURE_ENABLED_MASK	0x00000000

#define XCR_XFEATURE_IN_USE_MASK	0x00000001



static inline u64 xgetbv(u32 index)

{
@@ -20,4 +21,15 @@ static inline void xsetbv(u32 index, u64 value) 
	asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));

}



/*

 * Return a mask of xfeatures which are currently being tracked

 * by the processor as being in the initial configuration.

 *

 * Callers should check X86_FEATURE_XGETBV1.

 */

static inline u64 xfeatures_in_use(void)

{

	return xgetbv(XCR_XFEATURE_IN_USE_MASK);

}



#endif /* _ASM_X86_FPU_XCR_H */

arch/x86/include/asm/fpu/xstate.h

+7 −0
Original line number Diff line number Diff line
@@ -92,6 +92,13 @@ 
#define XFEATURE_MASK_FPSTATE	(XFEATURE_MASK_USER_RESTORE | \

				 XFEATURE_MASK_SUPERVISOR_SUPPORTED)



/*

 * Features in this mask have space allocated in the signal frame, but may not

 * have that space initialized when the feature is in its init state.

 */

#define XFEATURE_MASK_SIGFRAME_INITOPT	(XFEATURE_MASK_XTILE | \

					 XFEATURE_MASK_USER_DYNAMIC)



extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];



extern void __init update_regset_xstate_info(unsigned int size,

arch/x86/include/asm/intel-family.h

+2 −0
Original line number Diff line number Diff line
@@ -108,6 +108,8 @@ 
#define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */

#define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */



#define INTEL_FAM6_RAPTOR_LAKE		0xB7



/* "Small Core" Processors (Atom) */



#define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */