Unverified Commit 162a31ef authored by Mason Zhang's avatar Mason Zhang Committed by Mark Brown
Browse files

spi: mediatek: add no_need_unprepare support 



This patch add no_need_unprepare support for spi, if spi src clk is
MAIN PLL, it can keep the clk_prepare and will not cause low power
issue. So we no need do clk_prepare/clk_unprepare in runtime pm,
and it will get better performance, because clk_prepare has called
mutex lock.
In the same way,
clk_get_rate also has called mutex lock, so we moved it to spi_probe.

Signed-off-by: default avatarMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210629100814.21402-1-mason.zhang@mediatek.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3522d9aa

drivers/spi/spi-mt65xx.c

+34 −7
Original line number Diff line number Diff line
@@ -90,6 +90,8 @@ struct mtk_spi_compatible { 
	bool enhance_timing;

	/* some IC support DMA addr extension */

	bool dma_ext;

	/* some IC no need unprepare SPI clk */

	bool no_need_unprepare;

};



struct mtk_spi {
@@ -104,6 +106,7 @@ struct mtk_spi { 
	struct scatterlist *tx_sgl, *rx_sgl;

	u32 tx_sgl_len, rx_sgl_len;

	const struct mtk_spi_compatible *dev_comp;

	u32 spi_clk_hz;

};



static const struct mtk_spi_compatible mtk_common_compat;
@@ -135,6 +138,14 @@ static const struct mtk_spi_compatible mt8183_compat = { 
	.enhance_timing = true,

};



static const struct mtk_spi_compatible mt6893_compat = {

	.need_pad_sel = true,

	.must_tx = true,

	.enhance_timing = true,

	.dma_ext = true,

	.no_need_unprepare = true,

};



/*

 * A piece of default chip info unless the platform

 * supplies it.
@@ -174,6 +185,9 @@ static const struct of_device_id mtk_spi_of_match[] = { 
	{ .compatible = "mediatek,mt8192-spi",

		.data = (void *)&mt6765_compat,

	},

	{ .compatible = "mediatek,mt6893-spi",

		.data = (void *)&mt6893_compat,

	},

	{}

};

MODULE_DEVICE_TABLE(of, mtk_spi_of_match);
@@ -287,12 +301,11 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) 
static void mtk_spi_prepare_transfer(struct spi_master *master,

				     struct spi_transfer *xfer)

{

	u32 spi_clk_hz, div, sck_time, reg_val;

	u32 div, sck_time, reg_val;

	struct mtk_spi *mdata = spi_master_get_devdata(master);



	spi_clk_hz = clk_get_rate(mdata->spi_clk);

	if (xfer->speed_hz < spi_clk_hz / 2)

		div = DIV_ROUND_UP(spi_clk_hz, xfer->speed_hz);

	if (xfer->speed_hz < mdata->spi_clk_hz / 2)

		div = DIV_ROUND_UP(mdata->spi_clk_hz, xfer->speed_hz);

	else

		div = 1;
@@ -789,6 +802,11 @@ static int mtk_spi_probe(struct platform_device *pdev) 
		goto err_put_master;

	}



	mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk);



	if (mdata->dev_comp->no_need_unprepare)

		clk_disable(mdata->spi_clk);

	else

		clk_disable_unprepare(mdata->spi_clk);



	pm_runtime_enable(&pdev->dev);
@@ -857,6 +875,9 @@ static int mtk_spi_remove(struct platform_device *pdev) 


	mtk_spi_reset(mdata);



	if (mdata->dev_comp->no_need_unprepare)

		clk_unprepare(mdata->spi_clk);



	return 0;

}
@@ -905,6 +926,9 @@ static int mtk_spi_runtime_suspend(struct device *dev) 
	struct spi_master *master = dev_get_drvdata(dev);

	struct mtk_spi *mdata = spi_master_get_devdata(master);



	if (mdata->dev_comp->no_need_unprepare)

		clk_disable(mdata->spi_clk);

	else

		clk_disable_unprepare(mdata->spi_clk);



	return 0;
@@ -916,6 +940,9 @@ static int mtk_spi_runtime_resume(struct device *dev) 
	struct mtk_spi *mdata = spi_master_get_devdata(master);

	int ret;



	if (mdata->dev_comp->no_need_unprepare)

		ret = clk_enable(mdata->spi_clk);

	else

		ret = clk_prepare_enable(mdata->spi_clk);

	if (ret < 0) {

		dev_err(dev, "failed to enable spi_clk (%d)\n", ret);