dt-bindings: net: Convert Socionext NetSec Ethernet to DT schema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Socionext NetSec Ethernet Controller IP

maintainers:

  - Jassi Brar <jaswinder.singh@linaro.org>

  - Ilias Apalodimas <ilias.apalodimas@linaro.org>

allOf:

  - $ref: ethernet-controller.yaml#

properties:

  compatible:

    const: socionext,synquacer-netsec

  reg:

    items:

      - description: control register area

      - description: EEPROM holding the MAC address and microengine firmware

  clocks:

    maxItems: 1

  clock-names:

    const: phy_ref_clk

  dma-coherent: true

  interrupts:

    maxItems: 1

  mdio:

    $ref: mdio.yaml#

required:

  - compatible

  - reg

  - clocks

  - clock-names

  - interrupts

  - mdio

unevaluatedProperties: false

examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    ethernet@522d0000 {

        compatible = "socionext,synquacer-netsec";

        reg = <0x522d0000 0x10000>, <0x10000000 0x10000>;

        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&clk_netsec>;

        clock-names = "phy_ref_clk";

        phy-mode = "rgmii";

        max-speed = <1000>;

        max-frame-size = <9000>;

        phy-handle = <&phy1>;

        mdio {

            #address-cells = <1>;

            #size-cells = <0>;

            phy1: ethernet-phy@1 {

                compatible = "ethernet-phy-ieee802.3-c22";

                reg = <1>;

            };

        };

    };

...

* Socionext NetSec Ethernet Controller IP

Required properties:

- compatible: Should be "socionext,synquacer-netsec"

- reg: Address and length of the control register area, followed by the

       address and length of the EEPROM holding the MAC address and

       microengine firmware

- interrupts: Should contain ethernet controller interrupt

- clocks: phandle to the PHY reference clock

- clock-names: Should be "phy_ref_clk"

- phy-mode: See ethernet.txt file in the same directory

- phy-handle: See ethernet.txt in the same directory.

- mdio device tree subnode: When the Netsec has a phy connected to its local

		mdio, there must be device tree subnode with the following

		required properties:

	- #address-cells: Must be <1>.

	- #size-cells: Must be <0>.

	For each phy on the mdio bus, there must be a node with the following

	fields:

	- compatible: Refer to phy.txt

	- reg: phy id used to communicate to phy.

Optional properties: (See ethernet.txt file in the same directory)

- dma-coherent: Boolean property, must only be present if memory

	accesses performed by the device are cache coherent.

- max-speed: See ethernet.txt in the same directory.

- max-frame-size: See ethernet.txt in the same directory.

The MAC address will be determined using the optional properties

defined in ethernet.txt. The 'phy-mode' property is required, but may

be set to the empty string if the PHY configuration is programmed by

the firmware or set by hardware straps, and needs to be preserved.

Example:

	eth0: ethernet@522d0000 {

		compatible = "socionext,synquacer-netsec";

		reg = <0 0x522d0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>;

		interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&clk_netsec>;

		clock-names = "phy_ref_clk";

		phy-mode = "rgmii";

		max-speed = <1000>;

		max-frame-size = <9000>;

		phy-handle = <&phy1>;

		mdio {

			#address-cells = <1>;

			#size-cells = <0>;

			phy1: ethernet-phy@1 {

				compatible = "ethernet-phy-ieee802.3-c22";

				reg = <1>;

			};

		};

M:	Ilias Apalodimas <ilias.apalodimas@linaro.org>

L:	netdev@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/net/socionext-netsec.txt

F:	Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml

F:	drivers/net/ethernet/socionext/netsec.c

SOCIONEXT (SNI) Synquacer SPI DRIVER