Commit 1598fc57 authored by Aurabindo Pillai's avatar Aurabindo Pillai Committed by Alex Deucher
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drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+



For FPO/FAMS, DMCUB will try to change the output timings by writing to
the OTG registers. However, the timings written directly to the OTG
registers will not be honoured unless VMIN/VMAX selector registers are
programmed with the right bits and trigger source is selected correctly.
Proper solution needs to go into DMCUB but will require additional state
tracking to ensure that the selectors are set and reset correctly as per
driver state. Until fix is merged into firmware, apply the workaround in
driver to unconditionally write OTG vmin/vmax selectors.

Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3cb4807d
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+3 −12
Original line number Diff line number Diff line
@@ -930,19 +930,10 @@ void optc1_set_drr(
				OTG_FORCE_LOCK_ON_EVENT, 0,
				OTG_SET_V_TOTAL_MIN_MASK_EN, 0,
				OTG_SET_V_TOTAL_MIN_MASK, 0);
	}

	// Setup manual flow control for EOF via TRIG_A
	optc->funcs->setup_manual_trigger(optc);

	} else {
		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
				OTG_SET_V_TOTAL_MIN_MASK, 0,
				OTG_V_TOTAL_MIN_SEL, 0,
				OTG_V_TOTAL_MAX_SEL, 0,
				OTG_FORCE_LOCK_ON_EVENT, 0);

		optc->funcs->set_vtotal_min_max(optc, 0, 0);
	}
}

void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
+10 −0
Original line number Diff line number Diff line
@@ -462,6 +462,16 @@ void optc2_setup_manual_trigger(struct timing_generator *optc)
{
	struct optc *optc1 = DCN10TG_FROM_TG(optc);

	/* Set the min/max selectors unconditionally so that
	 * DMCUB fw may change OTG timings when necessary
	 * TODO: Remove the w/a after fixing the issue in DMCUB firmware
	 */
	REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
				 OTG_V_TOTAL_MIN_SEL, 1,
				 OTG_V_TOTAL_MAX_SEL, 1,
				 OTG_FORCE_LOCK_ON_EVENT, 0,
				 OTG_SET_V_TOTAL_MIN_MASK, (1 << 1)); /* TRIGA */

	REG_SET_8(OTG_TRIGA_CNTL, 0,
			OTG_TRIGA_SOURCE_SELECT, 21,
			OTG_TRIGA_SOURCE_PIPE_SELECT, optc->inst,