Commit 15596df7 authored by Paweł Anikiel's avatar Paweł Anikiel Committed by Dinh Nguyen
Browse files

ARM: dts: socfpga: Add Google Chameleon v3 devicetree 



Add devicetree for the Google Chameleon v3 board.

Signed-off-by: default avatarPaweł Anikiel <pan@semihalf.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 162552fa

arch/arm/boot/dts/Makefile

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@@ -1148,6 +1148,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ 
	s5pv210-torbreck.dtb

dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \

	socfpga_arria5_socdk.dtb \

	socfpga_arria10_chameleonv3.dtb \

	socfpga_arria10_socdk_nand.dtb \

	socfpga_arria10_socdk_qspi.dtb \

	socfpga_arria10_socdk_sdmmc.dtb \

arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts

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// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright 2022 Google LLC

 */

/dts-v1/;

#include "socfpga_arria10_mercury_aa1.dtsi"



/ {

	model = "Google Chameleon V3";

	compatible = "google,chameleon-v3", "enclustra,mercury-aa1",

		     "altr,socfpga-arria10", "altr,socfpga";



	aliases {

		serial0 = &uart0;

		i2c0 = &i2c0;

		i2c1 = &i2c1;

	};

};



&gmac0 {

	status = "okay";

};



&gpio0 {

	status = "okay";

};



&gpio1 {

	status = "okay";

};



&gpio2 {

	status = "okay";

};



&i2c0 {

	status = "okay";



	ssm2603: audio-codec@1a {

		compatible = "adi,ssm2603";

		reg = <0x1a>;

	};

};



&i2c1 {

	status = "okay";



	u80: gpio@21 {

		compatible = "nxp,pca9535";

		reg = <0x21>;

		gpio-controller;

		#gpio-cells = <2>;



		gpio-line-names =

			"SOM_AUD_MUTE",

			"DP1_OUT_CEC_EN",

			"DP2_OUT_CEC_EN",

			"DP1_SOM_PS8469_CAD",

			"DPD_SOM_PS8469_CAD",

			"DP_OUT_PWR_EN",

			"STM32_RST_L",

			"STM32_BOOT0",



			"FPGA_PROT",

			"STM32_FPGA_COMM0",

			"TP119",

			"TP120",

			"TP121",

			"TP122",

			"TP123",

			"TP124";

	};

};



&mmc {

	status = "okay";

};



&uart0 {

	status = "okay";

};



&uart1 {

	status = "okay";

};



&usb0 {

	status = "okay";

	dr_mode = "host";

};