Commit 1552dd6e authored Feb 14, 2023 by Ville Syrjälä

drm/i915: Sprinkle some FIXMEs about TGL+ DSI transcoder timing mess



The DSI code has some local hacks to program TRANS_VBLANK on
TGL+ (ICL DSI transcoders didn't have this register). That
will not work when we need to start using the delayed vblank
(for DSB purposes). Too lazy to figure out what the is going
on there, so just sprinkle FIXMEs in the hopes someone else
will spot them eventually.

v2: Only TRANS_{HBLANK,SET_CONTEXT_LATENCY} still no not
    exist for DSI transcoders, only TRANS_VBLANK

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230213225258.2127-12-ville.syrjala@linux.intel.com


Acked-by: Jani Nikula <jani.nikula@intel.com>

parent 2846cf3f

drivers/gpu/drm/i915/display/icl_dsi.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -957,7 +957,12 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder,
		}
		}

		/* program TRANS_VBLANK register, should be same as vtotal programmed */
		/*
		* program TRANS_VBLANK register, should be same as vtotal programmed
		*
		* FIXME get rid of these local hacks and do it right,
		* this will not handle eg. delayed vblank correctly.
		*/
		if (DISPLAY_VER(dev_priv) >= 12) {
		for_each_dsi_port(port, intel_dsi->ports) {
		dsi_trans = dsi_port_to_transcoder(port);

drivers/gpu/drm/i915/display/intel_display.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -2855,6 +2855,7 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc,
		adjusted_mode->crtc_vdisplay = REG_FIELD_GET(VACTIVE_MASK, tmp) + 1;
		adjusted_mode->crtc_vtotal = REG_FIELD_GET(VTOTAL_MASK, tmp) + 1;

		/* FIXME TGL+ DSI transcoders have this! */
		if (!transcoder_is_dsi(cpu_transcoder)) {
		tmp = intel_de_read(dev_priv, TRANS_VBLANK(cpu_transcoder));
		adjusted_mode->crtc_vblank_start = REG_FIELD_GET(VBLANK_START_MASK, tmp) + 1;