Commit 14d25e3f authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-dpaa-cleanups-in-preparation-for-phylink-conversion' 

Sean Anderson says:

====================
net: dpaa: Cleanups in preparation for phylink conversion

This series contains several cleanup patches for dpaa/fman. While they
are intended to prepare for a phylink conversion, they stand on their
own. This series was originally submitted as part of [1].

[1] https://lore.kernel.org/netdev/20220715215954.1449214-1-sean.anderson@seco.com
====================

Link: https://lore.kernel.org/r/20220818161649.2058728-1-sean.anderson@seco.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents bf294c3f c0e36be1

Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml

0 → 100644
+145 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP FMan MAC



maintainers:

  - Madalin Bucur <madalin.bucur@nxp.com>



description: |

  Each FMan has several MACs, each implementing an Ethernet interface. Earlier

  versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for

  10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller

  (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate

  Ethernet Media Access Controller (mEMAC) to handle all speeds.



properties:

  compatible:

    enum:

      - fsl,fman-dtsec

      - fsl,fman-xgec

      - fsl,fman-memac



  cell-index:

    maximum: 64

    description: |

      FManV2:

      register[bit]           MAC             cell-index

      ============================================================

      FM_EPI[16]              XGEC            8

      FM_EPI[16+n]            dTSECn          n-1

      FM_NPI[11+n]            dTSECn          n-1

              n = 1,..,5



      FManV3:

      register[bit]           MAC             cell-index

      ============================================================

      FM_EPI[16+n]            mEMACn          n-1

      FM_EPI[25]              mEMAC10         9



      FM_NPI[11+n]            mEMACn          n-1

      FM_NPI[10]              mEMAC10         9

      FM_NPI[11]              mEMAC9          8

              n = 1,..8



      FM_EPI and FM_NPI are located in the FMan memory map.



      2. SoC registers:



      - P2041, P3041, P4080 P5020, P5040:

      register[bit]           FMan            MAC             cell

                              Unit                            index

      ============================================================

      DCFG_DEVDISR2[7]        1               XGEC            8

      DCFG_DEVDISR2[7+n]      1               dTSECn          n-1

      DCFG_DEVDISR2[15]       2               XGEC            8

      DCFG_DEVDISR2[15+n]     2               dTSECn          n-1

              n = 1,..5



      - T1040, T2080, T4240, B4860:

      register[bit]                   FMan    MAC             cell

                                      Unit                    index

      ============================================================

      DCFG_CCSR_DEVDISR2[n-1]         1       mEMACn          n-1

      DCFG_CCSR_DEVDISR2[11+n]        2       mEMACn          n-1

              n = 1,..6,9,10



      EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in

      the specific SoC "Device Configuration/Pin Control" Memory

      Map.



  reg:

    maxItems: 1



  fsl,fman-ports:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    maxItems: 2

    description: |

      An array of two references: the first is the FMan RX port and the second

      is the TX port used by this MAC.



  ptp-timer:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: A reference to the IEEE1588 timer



  pcsphy-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: A reference to the PCS (typically found on the SerDes)



  tbi-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: A reference to the (TBI-based) PCS



required:

  - compatible

  - cell-index

  - reg

  - fsl,fman-ports

  - ptp-timer



allOf:

  - $ref: ethernet-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: fsl,fman-dtsec

    then:

      required:

        - tbi-handle

  - if:

      properties:

        compatible:

          contains:

            const: fsl,fman-memac

    then:

      required:

        - pcsphy-handle



unevaluatedProperties: false



examples:

  - |

    ethernet@e0000 {

            compatible = "fsl,fman-dtsec";

            cell-index = <0>;

            reg = <0xe0000 0x1000>;

            fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;

            ptp-timer = <&ptp_timer>;

            tbi-handle = <&tbi0>;

    };

  - |

    ethernet@e8000 {

            cell-index = <4>;

            compatible = "fsl,fman-memac";

            reg = <0xe8000 0x1000>;

            fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;

            ptp-timer = <&ptp_timer0>;

            pcsphy-handle = <&pcsphy4>;

            phy-handle = <&sgmii_phy1>;

            phy-connection-type = "sgmii";

    };

...

Documentation/devicetree/bindings/net/fsl-fman.txt

+1 −127
Original line number Diff line number Diff line
@@ -232,133 +232,7 @@ port@81000 { 
=============================================================================

FMan dTSEC/XGEC/mEMAC Node



DESCRIPTION



mEMAC/dTSEC/XGEC are the Ethernet network interfaces



PROPERTIES



- compatible

		Usage: required

		Value type: <stringlist>

		Definition: A standard property.

		Must include one of the following:

		- "fsl,fman-dtsec" for dTSEC MAC

		- "fsl,fman-xgec" for XGEC MAC

		- "fsl,fman-memac" for mEMAC MAC



- cell-index

		Usage: required

		Value type: <u32>

		Definition: Specifies the MAC id.



		The cell-index value may be used by the FMan or the SoC, to

		identify the MAC unit in the FMan (or SoC) memory map.

		In the tables below there's a description of the cell-index

		use, there are two tables, one describes the use of cell-index

		by the FMan, the second describes the use by the SoC:



		1. FMan Registers



		FManV2:

		register[bit]		MAC		cell-index

		============================================================

		FM_EPI[16]		XGEC		8

		FM_EPI[16+n]		dTSECn		n-1

		FM_NPI[11+n]		dTSECn		n-1

			n = 1,..,5



		FManV3:

		register[bit]		MAC		cell-index

		============================================================

		FM_EPI[16+n]		mEMACn		n-1

		FM_EPI[25]		mEMAC10		9



		FM_NPI[11+n]		mEMACn		n-1

		FM_NPI[10]		mEMAC10		9

		FM_NPI[11]		mEMAC9		8

			n = 1,..8



		FM_EPI and FM_NPI are located in the FMan memory map.



		2. SoC registers:



		- P2041, P3041, P4080 P5020, P5040:

		register[bit]		FMan		MAC		cell

					Unit				index

		============================================================

		DCFG_DEVDISR2[7]	1		XGEC		8

		DCFG_DEVDISR2[7+n]	1		dTSECn		n-1

		DCFG_DEVDISR2[15]	2		XGEC		8

		DCFG_DEVDISR2[15+n]	2		dTSECn		n-1

			n = 1,..5



		- T1040, T2080, T4240, B4860:

		register[bit]			FMan	MAC		cell

						Unit			index

		============================================================

		DCFG_CCSR_DEVDISR2[n-1]		1	mEMACn		n-1

		DCFG_CCSR_DEVDISR2[11+n]	2	mEMACn		n-1

			n = 1,..6,9,10



		EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in

		the specific SoC "Device Configuration/Pin Control" Memory

		Map.



- reg

		Usage: required

		Value type: <prop-encoded-array>

		Definition: A standard property.



- fsl,fman-ports

		Usage: required

		Value type: <prop-encoded-array>

		Definition: An array of two phandles - the first references is

		the FMan RX port and the second is the TX port used by this

		MAC.



- ptp-timer

		Usage required

		Value type: <phandle>

		Definition: A phandle for 1EEE1588 timer.



- pcsphy-handle

		Usage required for "fsl,fman-memac" MACs

		Value type: <phandle>

		Definition: A phandle for pcsphy.



- tbi-handle

		Usage required for "fsl,fman-dtsec" MACs

		Value type: <phandle>

		Definition: A phandle for tbiphy.



EXAMPLE



fman1_tx28: port@a8000 {

	cell-index = <0x28>;

	compatible = "fsl,fman-v2-port-tx";

	reg = <0xa8000 0x1000>;

};



fman1_rx8: port@88000 {

	cell-index = <0x8>;

	compatible = "fsl,fman-v2-port-rx";

	reg = <0x88000 0x1000>;

};



ptp-timer: ptp_timer@fe000 {

	compatible = "fsl,fman-ptp-timer";

	reg = <0xfe000 0x1000>;

};



ethernet@e0000 {

	compatible = "fsl,fman-dtsec";

	cell-index = <0>;

	reg = <0xe0000 0x1000>;

	fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;

	ptp-timer = <&ptp-timer>;

	tbi-handle = <&tbi0>;

};

Refer to Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml



============================================================================

FMan IEEE 1588 Node

drivers/net/ethernet/freescale/dpaa/dpaa_eth.c

+7 −4
Original line number Diff line number Diff line
@@ -288,9 +288,11 @@ static int dpaa_stop(struct net_device *net_dev) 
	 */

	msleep(200);



	err = mac_dev->stop(mac_dev);

	if (mac_dev->phy_dev)

		phy_stop(mac_dev->phy_dev);

	err = mac_dev->disable(mac_dev->fman_mac);

	if (err < 0)

		netif_err(priv, ifdown, net_dev, "mac_dev->stop() = %d\n",

		netif_err(priv, ifdown, net_dev, "mac_dev->disable() = %d\n",

			  err);



	for (i = 0; i < ARRAY_SIZE(mac_dev->port); i++) {
@@ -2942,11 +2944,12 @@ static int dpaa_open(struct net_device *net_dev) 
			goto mac_start_failed;

	}



	err = priv->mac_dev->start(mac_dev);

	err = priv->mac_dev->enable(mac_dev->fman_mac);

	if (err < 0) {

		netif_err(priv, ifup, net_dev, "mac_dev->start() = %d\n", err);

		netif_err(priv, ifup, net_dev, "mac_dev->enable() = %d\n", err);

		goto mac_start_failed;

	}

	phy_start(priv->mac_dev->phy_dev);



	netif_tx_start_all_queues(net_dev);

drivers/net/ethernet/freescale/fman/fman.c

+2 −29
Original line number Diff line number Diff line 
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later

/*

 * Copyright 2008 - 2015 Freescale Semiconductor Inc.

 * Copyright 2020 NXP

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions are met:

 *     * Redistributions of source code must retain the above copyright

 *       notice, this list of conditions and the following disclaimer.

 *     * Redistributions in binary form must reproduce the above copyright

 *       notice, this list of conditions and the following disclaimer in the

 *       documentation and/or other materials provided with the distribution.

 *     * Neither the name of Freescale Semiconductor nor the

 *       names of its contributors may be used to endorse or promote products

 *       derived from this software without specific prior written permission.

 *

 *

 * ALTERNATIVELY, this software may be distributed under the terms of the

 * GNU General Public License ("GPL") as published by the Free Software

 * Foundation, either version 2 of that License or (at your option) any

 * later version.

 *

 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY

 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY

 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */



#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

drivers/net/ethernet/freescale/fman/fman.h

+2 −29
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */

/*

 * Copyright 2008 - 2015 Freescale Semiconductor Inc.

 * Copyright 2020 NXP

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions are met:

 *     * Redistributions of source code must retain the above copyright

 *       notice, this list of conditions and the following disclaimer.

 *     * Redistributions in binary form must reproduce the above copyright

 *       notice, this list of conditions and the following disclaimer in the

 *       documentation and/or other materials provided with the distribution.

 *     * Neither the name of Freescale Semiconductor nor the

 *       names of its contributors may be used to endorse or promote products

 *       derived from this software without specific prior written permission.

 *

 *

 * ALTERNATIVELY, this software may be distributed under the terms of the

 * GNU General Public License ("GPL") as published by the Free Software

 * Foundation, either version 2 of that License or (at your option) any

 * later version.

 *

 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY

 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY

 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */



#ifndef __FM_H