Commit 14ad0e7d authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: syscall real mode entry use mtmsrd rather than rfid 



Have the real mode system call entry handler branch to the kernel
0xc000... address and then use mtmsrd to enable the MMU, rather than use
SRRs and rfid.

Commit 8729c26e ("powerpc/64s/exception: Move real to virt switch
into the common handler") implemented this style of real mode entry for
other interrupt handlers, so this brings system calls into line with
them, which is the main motivcation for the change.

This tends to be slightly faster due to avoiding the mtsprs, and it also
does not clobber the SRR registers, which becomes important in a
subsequent change. The real mode entry points don't tend to be too
important for performance these days, but it is possible for a
hypervisor to run guests in AIL=0 mode for certian reasons.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210208063326.331502-1-npiggin@gmail.com
parent 60a707d0

arch/powerpc/kernel/entry_64.S

+6 −0
Original line number Diff line number Diff line
@@ -225,6 +225,12 @@ _ASM_NOKPROBE_SYMBOL(system_call_vectored_emulate) 
	b	system_call_vectored_common

#endif



	.balign IFETCH_ALIGN_BYTES

	.globl system_call_common_real

system_call_common_real:

	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */

	mtmsrd	r10



	.balign IFETCH_ALIGN_BYTES

	.globl system_call_common

system_call_common:

arch/powerpc/kernel/exceptions-64s.S

+3 −6
Original line number Diff line number Diff line
@@ -1973,12 +1973,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) 
	HMT_MEDIUM



	.if ! \virt

	__LOAD_HANDLER(r10, system_call_common)

	mtspr	SPRN_SRR0,r10

	ld	r10,PACAKMSR(r13)

	mtspr	SPRN_SRR1,r10

	RFI_TO_KERNEL

	b	.	/* prevent speculative execution */

	__LOAD_HANDLER(r10, system_call_common_real)

	mtctr	r10

	bctr

	.else

	li	r10,MSR_RI

	mtmsrd 	r10,1			/* Set RI (EE=0) */