Commit 148a6504 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pci-v5.18-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci 

Pull pci updates from Bjorn Helgaas:
 "Enumeration:
   - Move the VGA arbiter from drivers/gpu to drivers/pci because it's
     PCI-specific, not GPU-specific (Bjorn Helgaas)
   - Select the default VGA device consistently whether it's enumerated
     before or after VGA arbiter init, which fixes arches that enumerate
     PCI devices late (Huacai Chen)

  Resource management:
   - Support BAR sizes up to 8TB (Dongdong Liu)

  PCIe native device hotplug:
   - Fix "Command Completed" tracking to avoid spurious timouts when
     powering off empty slots (Liguang Zhang)
   - Quirk Qualcomm devices that don't implement Command Completed
     correctly, again to avoid spurious timeouts (Manivannan Sadhasivam)

  Peer-to-peer DMA:
   - Add Intel 3rd Gen Intel Xeon Scalable Processors to whitelist
     (Michael J. Ruhl)

  APM X-Gene PCIe controller driver:
   - Revert generic DT parsing changes that broke some machines in the
     field (Marc Zyngier)

  Freescale i.MX6 PCIe controller driver:
   - Allow controller probe to succeed even when no devices currently
     present to allow hot-add later (Fabio Estevam)
   - Enable power management on i.MX6QP (Richard Zhu)
   - Assert CLKREQ# on i.MX8MM so enumeration doesn't hang when no
     device is connected (Richard Zhu)

  Marvell Aardvark PCIe controller driver:
   - Fix MSI and MSI-X support (Marek Behún, Pali Rohár)
   - Add support for ERR and PME interrupts (Pali Rohár)

  Marvell MVEBU PCIe controller driver:
   - Add DT binding and support for "num-lanes" (Pali Rohár)
   - Add support for INTx interrupts (Pali Rohár)

  Microsoft Hyper-V host bridge driver:
   - Avoid unnecessary hypercalls when unmasking IRQs on ARM64 (Boqun
     Feng)

  Qualcomm PCIe controller driver:
   - Add SM8450 DT binding and driver support (Dmitry Baryshkov)

  Renesas R-Car PCIe controller driver:
   - Help the controller get to the L1 state since the hardware can't do
     it on its own (Marek Vasut)
   - Return PCI_ERROR_RESPONSE (~0) for reads that fail on PCIe (Marek
     Vasut)

  SiFive FU740 PCIe controller driver:
   - Drop redundant '-gpios' from DT GPIO lookup (Ben Dooks)
   - Force 2.5GT/s for initial device probe (Ben Dooks)

  Socionext UniPhier Pro5 controller driver:
   - Add NX1 DT binding and driver support (Kunihiko Hayashi)

  Synopsys DesignWare PCIe controller driver:
   - Restore MSI configuration so MSI works after resume (Jisheng
     Zhang)"

* tag 'pci-v5.18-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits)
  x86/PCI: Add #includes to asm/pci_x86.h
  PCI: ibmphp: Remove unused assignments
  PCI: cpqphp: Remove unused assignments
  PCI: fu740: Remove unused assignments
  PCI: kirin: Remove unused assignments
  PCI: Remove unused assignments
  PCI: Declare pci_filp_private only when HAVE_PCI_MMAP
  PCI: Avoid broken MSI on SB600 USB devices
  PCI: fu740: Force 2.5GT/s for initial device probe
  PCI: xgene: Revert "PCI: xgene: Fix IB window setup"
  PCI: xgene: Revert "PCI: xgene: Use inbound resources for setup"
  PCI: imx6: Assert i.MX8MM CLKREQ# even if no device present
  PCI: imx6: Invoke the PHY exit function after PHY power off
  PCI: rcar: Use PCI_SET_ERROR_RESPONSE after read which triggered an exception
  PCI: rcar: Finish transition to L1 state in rcar_pcie_config_access()
  PCI: dwc: Restore MSI Receiver mask during resume
  PCI: fu740: Drop redundant '-gpios' from DT GPIO lookup
  PCI/VGA: Replace full MIT license text with SPDX identifier
  PCI/VGA: Use unsigned format string to print lock counts
  PCI/VGA: Log bridge control messages when adding devices
  ...
parents 636f64db 611f8418

Documentation/devicetree/bindings/pci/mvebu-pci.txt

+16 −0
Original line number Diff line number Diff line
@@ -77,9 +77,15 @@ and the following optional properties: 
- marvell,pcie-lane: the physical PCIe lane number, for ports having

  multiple lanes. If this property is not found, we assume that the

  value is 0.

- num-lanes: number of SerDes PCIe lanes for this link (1 or 4)

- reset-gpios: optional GPIO to PERST#

- reset-delay-us: delay in us to wait after reset de-assertion, if not

  specified will default to 100ms, as required by the PCIe specification.

- interrupt-names: list of interrupt names, supported are:

   - "intx" - interrupt line triggered by one of the legacy interrupt

- interrupts or interrupts-extended: List of the interrupt sources which

  corresponding to the "interrupt-names". If non-empty then also additional

  'interrupt-controller' subnode must be defined.



Example:
@@ -141,6 +147,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 58>;

		marvell,pcie-port = <0>;

		marvell,pcie-lane = <0>;

		num-lanes = <1>;

		/* low-active PERST# reset on GPIO 25 */

		reset-gpios = <&gpio0 25 1>;

		/* wait 20ms for device settle after reset deassertion */
@@ -161,6 +168,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 59>;

		marvell,pcie-port = <0>;

		marvell,pcie-lane = <1>;

		num-lanes = <1>;

		clocks = <&gateclk 6>;

	};
@@ -177,6 +185,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 60>;

		marvell,pcie-port = <0>;

		marvell,pcie-lane = <2>;

		num-lanes = <1>;

		clocks = <&gateclk 7>;

	};
@@ -193,6 +202,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 61>;

		marvell,pcie-port = <0>;

		marvell,pcie-lane = <3>;

		num-lanes = <1>;

		clocks = <&gateclk 8>;

	};
@@ -209,6 +219,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 62>;

		marvell,pcie-port = <1>;

		marvell,pcie-lane = <0>;

		num-lanes = <1>;

		clocks = <&gateclk 9>;

	};
@@ -225,6 +236,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 63>;

		marvell,pcie-port = <1>;

		marvell,pcie-lane = <1>;

		num-lanes = <1>;

		clocks = <&gateclk 10>;

	};
@@ -241,6 +253,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 64>;

		marvell,pcie-port = <1>;

		marvell,pcie-lane = <2>;

		num-lanes = <1>;

		clocks = <&gateclk 11>;

	};
@@ -257,6 +270,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 65>;

		marvell,pcie-port = <1>;

		marvell,pcie-lane = <3>;

		num-lanes = <1>;

		clocks = <&gateclk 12>;

	};
@@ -273,6 +287,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 99>;

		marvell,pcie-port = <2>;

		marvell,pcie-lane = <0>;

		num-lanes = <1>;

		clocks = <&gateclk 26>;

	};
@@ -289,6 +304,7 @@ pcie-controller { 
		interrupt-map = <0 0 0 0 &mpic 103>;

		marvell,pcie-port = <3>;

		marvell,pcie-lane = <0>;

		num-lanes = <1>;

		clocks = <&gateclk 27>;

	};

};

Documentation/devicetree/bindings/pci/qcom,pcie.txt

+21 −1
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 
			- "qcom,pcie-sc8180x" for sc8180x

			- "qcom,pcie-sdm845" for sdm845

			- "qcom,pcie-sm8250" for sm8250

			- "qcom,pcie-sm8450-pcie0" for PCIe0 on sm8450

			- "qcom,pcie-sm8450-pcie1" for PCIe1 on sm8450

			- "qcom,pcie-ipq6018" for ipq6018



- reg:
@@ -169,6 +171,24 @@ 
			- "ddrss_sf_tbu" PCIe SF TBU clock

			- "pipe"	PIPE clock



- clock-names:

	Usage: required for sm8450-pcie0 and sm8450-pcie1

	Value type: <stringlist>

	Definition: Should contain the following entries

			- "aux"         Auxiliary clock

			- "cfg"         Configuration clock

			- "bus_master"  Master AXI clock

			- "bus_slave"   Slave AXI clock

			- "slave_q2a"   Slave Q2A clock

			- "tbu"         PCIe TBU clock

			- "ddrss_sf_tbu" PCIe SF TBU clock

			- "pipe"        PIPE clock

			- "pipe_mux"    PIPE MUX

			- "phy_pipe"    PIPE output clock

			- "ref"         REFERENCE clock

			- "aggre0"	Aggre NoC PCIe0 AXI clock, only for sm8450-pcie0

			- "aggre1"	Aggre NoC PCIe1 AXI clock



- resets:

	Usage: required

	Value type: <prop-encoded-array>
@@ -246,7 +266,7 @@ 
			- "ahb"			AHB reset



- reset-names:

	Usage: required for sc8180x, sdm845 and sm8250

	Usage: required for sc8180x, sdm845, sm8250 and sm8450

	Value type: <stringlist>

	Definition: Should contain the following entries

			- "pci"			PCIe core reset

Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml

+15 −7
Original line number Diff line number Diff line
@@ -20,7 +20,9 @@ allOf: 


properties:

  compatible:

    const: socionext,uniphier-pro5-pcie-ep

    enum:

      - socionext,uniphier-pro5-pcie-ep

      - socionext,uniphier-nx1-pcie-ep



  reg:

    minItems: 4
@@ -41,20 +43,26 @@ properties: 
          - const: atu



  clocks:

    minItems: 1

    maxItems: 2



  clock-names:

    items:

    oneOf:

      - items:              # for Pro5

          - const: gio

          - const: link

      - const: link         # for NX1



  resets:

    minItems: 1

    maxItems: 2



  reset-names:

    items:

    oneOf:

      - items:              # for Pro5

          - const: gio

          - const: link

      - const: link         # for NX1



  num-ib-windows:

    const: 16

Documentation/gpu/vgaarbiter.rst

+1 −1
Original line number Diff line number Diff line
@@ -100,7 +100,7 @@ In-kernel interface 
.. kernel-doc:: include/linux/vgaarb.h

   :internal:



.. kernel-doc:: drivers/gpu/vga/vgaarb.c

.. kernel-doc:: drivers/pci/vgaarb.c

   :export:



libpciaccess

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -14938,6 +14938,7 @@ F: drivers/pci/controller/mobiveil/pcie-mobiveil* 








PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)









M:	Thomas Petazzoni <thomas.petazzoni@bootlin.com>









M:	Pali Rohár <pali@kernel.org>









L:	linux-pci@vger.kernel.org









L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)









S:	Maintained