Commit 14350ed9 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-v5.17-samsung' of... 

Merge tag 'clk-v5.17-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
 - refactoring of the CPU clocks registration to use common interface
 - an update of the Exynos850 driver (support for more clock domains)
   required by the E850-96 development board
 - initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)

* tag 'clk-v5.17-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: Add initial Exynos7885 clock driver
  clk: samsung: clk-pll: Add support for pll1417x
  clk: samsung: Make exynos850_register_cmu shared
  dt-bindings: clock: Document Exynos7885 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
  clk: samsung: exynos850: Add missing sysreg clocks
  dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
  clk: samsung: exynos850: Register clocks early
  clk: samsung: exynos850: Keep some crucial clocks running
  clk: samsung: exynos850: Implement CMU_CMGP domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
  clk: samsung: exynos850: Implement CMU_APM domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_APM
  clk: samsung: Update CPU clk registration
  clk: samsung: Remove meaningless __init and extern from header files
  clk: samsung: remove __clk_lookup() usage
  dt-bindings: clock: samsung: add IDs for some core clocks
parents fa55b7dc 45bd8166

Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Samsung Exynos7885 SoC clock controller



maintainers:

  - Dávid Virág <virag.david003@gmail.com>

  - Chanwoo Choi <cw00.choi@samsung.com>

  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

  - Sylwester Nawrocki <s.nawrocki@samsung.com>

  - Tomasz Figa <tomasz.figa@gmail.com>



description: |

  Exynos7885 clock controller is comprised of several CMU units, generating

  clocks for different domains. Those CMU units are modeled as separate device

  tree nodes, and might depend on each other. The root clock in that root tree

  is an external clock: OSCCLK (26 MHz). This external clock must be defined

  as a fixed-rate clock in dts.



  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and

  dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.



  Each clock is assigned an identifier and client nodes can use this identifier

  to specify the clock which they consume. All clocks available for usage

  in clock consumer nodes are defined as preprocessor macros in

  'dt-bindings/clock/exynos7885.h' header.



properties:

  compatible:

    enum:

      - samsung,exynos7885-cmu-top

      - samsung,exynos7885-cmu-core

      - samsung,exynos7885-cmu-peri



  clocks:

    minItems: 1

    maxItems: 10



  clock-names:

    minItems: 1

    maxItems: 10



  "#clock-cells":

    const: 1



  reg:

    maxItems: 1



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos7885-cmu-top



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)



        clock-names:

          items:

            - const: oscclk



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos7885-cmu-core



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_CORE bus clock (from CMU_TOP)

            - description: CCI clock (from CMU_TOP)

            - description: G3D clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_core_bus

            - const: dout_core_cci

            - const: dout_core_g3d



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos7885-cmu-peri



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_PERI bus clock (from CMU_TOP)

            - description: SPI0 clock (from CMU_TOP)

            - description: SPI1 clock (from CMU_TOP)

            - description: UART0 clock (from CMU_TOP)

            - description: UART1 clock (from CMU_TOP)

            - description: UART2 clock (from CMU_TOP)

            - description: USI0 clock (from CMU_TOP)

            - description: USI1 clock (from CMU_TOP)

            - description: USI2 clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_peri_bus

            - const: dout_peri_spi0

            - const: dout_peri_spi1

            - const: dout_peri_uart0

            - const: dout_peri_uart1

            - const: dout_peri_uart2

            - const: dout_peri_usi0

            - const: dout_peri_usi1

            - const: dout_peri_usi2



required:

  - compatible

  - "#clock-cells"

  - clocks

  - clock-names

  - reg



additionalProperties: false



examples:

  # Clock controller node for CMU_PERI

  - |

    #include <dt-bindings/clock/exynos7885.h>



    cmu_peri: clock-controller@10010000 {

        compatible = "samsung,exynos7885-cmu-peri";

        reg = <0x10010000 0x8000>;

        #clock-cells = <1>;



        clocks = <&oscclk>,

                 <&cmu_top CLK_DOUT_PERI_BUS>,

                 <&cmu_top CLK_DOUT_PERI_SPI0>,

                 <&cmu_top CLK_DOUT_PERI_SPI1>,

                 <&cmu_top CLK_DOUT_PERI_UART0>,

                 <&cmu_top CLK_DOUT_PERI_UART1>,

                 <&cmu_top CLK_DOUT_PERI_UART2>,

                 <&cmu_top CLK_DOUT_PERI_USI0>,

                 <&cmu_top CLK_DOUT_PERI_USI1>,

                 <&cmu_top CLK_DOUT_PERI_USI2>;

        clock-names = "oscclk",

                      "dout_peri_bus",

                      "dout_peri_spi0",

                      "dout_peri_spi1",

                      "dout_peri_uart0",

                      "dout_peri_uart1",

                      "dout_peri_uart2",

                      "dout_peri_usi0",

                      "dout_peri_usi1",

                      "dout_peri_usi2";

    };



...

Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

+38 −0
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@@ -32,6 +32,8 @@ properties: 
  compatible:

    enum:

      - samsung,exynos850-cmu-top

      - samsung,exynos850-cmu-apm

      - samsung,exynos850-cmu-cmgp

      - samsung,exynos850-cmu-core

      - samsung,exynos850-cmu-dpu

      - samsung,exynos850-cmu-hsi
@@ -68,6 +70,42 @@ allOf: 
          items:

            - const: oscclk



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-apm



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_APM bus clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_clkcmu_apm_bus



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-cmgp



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_CMGP bus clock (from CMU_APM)



        clock-names:

          items:

            - const: oscclk

            - const: gout_clkcmu_cmgp_bus



  - if:

      properties:

        compatible:

drivers/clk/samsung/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -16,7 +16,9 @@ obj-$(CONFIG_EXYNOS_5420_COMMON_CLK) += clk-exynos5-subcmu.o 
obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos5433.o

obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o

obj-$(CONFIG_EXYNOS_CLKOUT)	+= clk-exynos-clkout.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos-arm64.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos7.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos7885.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos850.o

obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o

obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o

drivers/clk/samsung/clk-cpu.c

+1 −1
Original line number Diff line number Diff line
@@ -400,7 +400,7 @@ static int exynos5433_cpuclk_notifier_cb(struct notifier_block *nb, 
}



/* helper function to register a CPU clock */

int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,

static int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,

		unsigned int lookup_id, const char *name,

		const struct clk_hw *parent, const struct clk_hw *alt_parent,

		unsigned long offset, const struct exynos_cpuclk_cfg_data *cfg,

drivers/clk/samsung/clk-cpu.h

+0 −7
Original line number Diff line number Diff line
@@ -62,11 +62,4 @@ struct exynos_cpuclk { 
#define CLK_CPU_HAS_E5433_REGS_LAYOUT	(1 << 2)

};



int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,

			unsigned int lookup_id, const char *name,

			const struct clk_hw *parent, const struct clk_hw *alt_parent,

			unsigned long offset,

			const struct exynos_cpuclk_cfg_data *cfg,

			unsigned long num_cfgs, unsigned long flags);



#endif /* __SAMSUNG_CLK_CPU_H */