Commit 13e948a3 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8250: Commonize PCIe pins 



Commonize PCIe pins, as the configuration is SoC-common
and doesn't change (or at least doesn't change much) between
boards.

While at it, remove "output-low" from the RB5 board, as it's
not necessary - we already explicitly pull the perst pin low.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210616122708.144770-2-konrad.dybcio@somainline.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 46e14907

arch/arm64/boot/dts/qcom/qrb5165-rb5.dts

+0 −87
Original line number Diff line number Diff line
@@ -669,10 +669,6 @@ 


&pcie0 {

	status = "okay";

	perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;

	wake-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;

	pinctrl-names = "default";

	pinctrl-0 = <&pcie0_default_state>;

};



&pcie0_phy {
@@ -683,10 +679,6 @@ 


&pcie1 {

	status = "okay";

	perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>;

	wake-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;

	pinctrl-names = "default";

	pinctrl-0 = <&pcie1_default_state>;

};



&pcie1_phy {
@@ -697,10 +689,6 @@ 


&pcie2 {

	status = "okay";

	perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>;

	wake-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;

	pinctrl-names = "default";

	pinctrl-0 = <&pcie2_default_state>;

};



&pcie2_phy {
@@ -1178,81 +1166,6 @@ 
		bias-disable;

	};



	pcie0_default_state: pcie0-default {

		clkreq {

			pins = "gpio80";

			function = "pci_e0";

			bias-pull-up;

		};



		reset-n {

			pins = "gpio79";

			function = "gpio";



			drive-strength = <2>;

			output-low;

			bias-pull-down;

		};



		wake-n {

			pins = "gpio81";

			function = "gpio";



			drive-strength = <2>;

			bias-pull-up;

		};

	};



	pcie1_default_state: pcie1-default {

		clkreq {

			pins = "gpio83";

			function = "pci_e1";

			bias-pull-up;

		};



		reset-n {

			pins = "gpio82";

			function = "gpio";



			drive-strength = <2>;

			output-low;

			bias-pull-down;

		};



		wake-n {

			pins = "gpio84";

			function = "gpio";



			drive-strength = <2>;

			bias-pull-up;

		};

	};



	pcie2_default_state: pcie2-default {

		clkreq {

			pins = "gpio86";

			function = "pci_e2";

			bias-pull-up;

		};



		reset-n {

			pins = "gpio85";

			function = "gpio";



			drive-strength = <2>;

			output-low;

			bias-pull-down;

		};



		wake-n {

			pins = "gpio87";

			function = "gpio";



			drive-strength = <2>;

			bias-pull-up;

		};

	};



	sdc2_default_state: sdc2-default {

		clk {

			pins = "sdc2_clk";

arch/arm64/boot/dts/qcom/sm8250.dtsi

+87 −0
Original line number Diff line number Diff line
@@ -1314,6 +1314,12 @@ 
			phys = <&pcie0_lane>;

			phy-names = "pciephy";



			perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;

			enable-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;



			pinctrl-names = "default";

			pinctrl-0 = <&pcie0_default_state>;



			status = "disabled";

		};
@@ -1412,6 +1418,12 @@ 
			phys = <&pcie1_lane>;

			phy-names = "pciephy";



			perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>;

			enable-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;



			pinctrl-names = "default";

			pinctrl-0 = <&pcie1_default_state>;



			status = "disabled";

		};
@@ -1512,6 +1524,12 @@ 
			phys = <&pcie2_lane>;

			phy-names = "pciephy";



			perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>;

			enable-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;



			pinctrl-names = "default";

			pinctrl-0 = <&pcie2_default_state>;



			status = "disabled";

		};
@@ -3490,6 +3508,75 @@ 
					bias-pull-up;

				};

			};



			pcie0_default_state: pcie0-default {

				perst {

					pins = "gpio79";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-down;

				};



				clkreq {

					pins = "gpio80";

					function = "pci_e0";

					drive-strength = <2>;

					bias-pull-up;

				};



				wake {

					pins = "gpio81";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-up;

				};

			};



			pcie1_default_state: pcie1-default {

				perst {

					pins = "gpio82";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-down;

				};



				clkreq {

					pins = "gpio83";

					function = "pci_e1";

					drive-strength = <2>;

					bias-pull-up;

				};



				wake {

					pins = "gpio84";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-up;

				};

			};



			pcie2_default_state: pcie2-default {

				perst {

					pins = "gpio85";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-down;

				};



				clkreq {

					pins = "gpio86";

					function = "pci_e2";

					drive-strength = <2>;

					bias-pull-up;

				};



				wake {

					pins = "gpio87";

					function = "gpio";

					drive-strength = <2>;

					bias-pull-up;

				};

			};

		};



		apps_smmu: iommu@15000000 {