Commit 139017c8 authored by Tony Luck's avatar Tony Luck Committed by Wen Zhiwei
Browse files

x86/mm: Switch to new Intel CPU model defines 

stable inclusion
from stable-v6.6.53
commit 26b0a1cd9f228e802e3661c469acf740a4e63ed9
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IAZ0GM

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=26b0a1cd9f228e802e3661c469acf740a4e63ed9



--------------------------------

commit 2eda374e883ad297bd9fe575a16c1dc850346075 upstream.

New CPU #defines encode vendor and family as well as model.

[ dhansen: vertically align 0's in invlpg_miss_ids[] ]

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181518.41946-1-tony.luck%40intel.com


[ Ricardo: I used the old match macro X86_MATCH_INTEL_FAM6_MODEL()
  instead of X86_MATCH_VFM() as in the upstream commit. ]
Signed-off-by: default avatarRicardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarWen Zhiwei <wenzhiwei@kylinos.cn>
parent 367dcfb3

arch/x86/mm/init.c

+6 −10
Original line number Diff line number Diff line
@@ -261,21 +261,17 @@ static void __init probe_page_size_mask(void) 
	}

}



#define INTEL_MATCH(_model) { .vendor  = X86_VENDOR_INTEL,	\

			      .family  = 6,			\

			      .model = _model,			\

			    }

/*

 * INVLPG may not properly flush Global entries

 * on these CPUs when PCIDs are enabled.

 */

static const struct x86_cpu_id invlpg_miss_ids[] = {

	INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),

	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),

	INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),

	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),

	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),

	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,      0),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,    0),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, 0),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,     0),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,   0),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,   0),

	{}

};