Commit 13224794 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Linus Torvalds
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mm: remove quicklist page table caches

Patch series "mm: remove quicklist page table caches".

A while ago Nicholas proposed to remove quicklist page table caches [1].

I've rebased his patch on the curren upstream and switched ia64 and sh to
use generic versions of PTE allocation.

[1] https://lore.kernel.org/linux-mm/20190711030339.20892-1-npiggin@gmail.com

This patch (of 3):

Remove page table allocator "quicklists".  These have been around for a
long time, but have not got much traction in the last decade and are only
used on ia64 and sh architectures.

The numbers in the initial commit look interesting but probably don't
apply anymore.  If anybody wants to resurrect this it's in the git
history, but it's unhelpful to have this code and divergent allocator
behaviour for minor archs.

Also it might be better to instead make more general improvements to page
allocator if this is still so slow.

Link: http://lkml.kernel.org/r/1565250728-21721-2-git-send-email-rppt@linux.ibm.com


Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMike Rapoport <rppt@linux.ibm.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 7b167b68
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+0 −2
Original line number Original line Diff line number Diff line
@@ -53,6 +53,4 @@ pmd_free(struct mm_struct *mm, pmd_t *pmd)
	free_page((unsigned long)pmd);
	free_page((unsigned long)pmd);
}
}


#define check_pgt_cache()	do { } while (0)

#endif /* _ALPHA_PGALLOC_H */
#endif /* _ALPHA_PGALLOC_H */
+0 −1
Original line number Original line Diff line number Diff line
@@ -129,7 +129,6 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t ptep)


#define __pte_free_tlb(tlb, pte, addr)  pte_free((tlb)->mm, pte)
#define __pte_free_tlb(tlb, pte, addr)  pte_free((tlb)->mm, pte)


#define check_pgt_cache()   do { } while (0)
#define pmd_pgtable(pmd)	((pgtable_t) pmd_page_vaddr(pmd))
#define pmd_pgtable(pmd)	((pgtable_t) pmd_page_vaddr(pmd))


#endif /* _ASM_ARC_PGALLOC_H */
#endif /* _ASM_ARC_PGALLOC_H */
+0 −2
Original line number Original line Diff line number Diff line
@@ -15,8 +15,6 @@
#include <asm/cacheflush.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/tlbflush.h>


#define check_pgt_cache()		do { } while (0)

#ifdef CONFIG_MMU
#ifdef CONFIG_MMU


#define _PAGE_USER_TABLE	(PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
#define _PAGE_USER_TABLE	(PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
+0 −2
Original line number Original line Diff line number Diff line
@@ -15,8 +15,6 @@


#include <asm-generic/pgalloc.h>	/* for pte_{alloc,free}_one */
#include <asm-generic/pgalloc.h>	/* for pte_{alloc,free}_one */


#define check_pgt_cache()		do { } while (0)

#define PGD_SIZE	(PTRS_PER_PGD * sizeof(pgd_t))
#define PGD_SIZE	(PTRS_PER_PGD * sizeof(pgd_t))


#if CONFIG_PGTABLE_LEVELS > 2
#if CONFIG_PGTABLE_LEVELS > 2
+0 −2
Original line number Original line Diff line number Diff line
@@ -75,8 +75,6 @@ do { \
	tlb_remove_page(tlb, pte);			\
	tlb_remove_page(tlb, pte);			\
} while (0)
} while (0)


#define check_pgt_cache()	do {} while (0)

extern void pagetable_init(void);
extern void pagetable_init(void);
extern void pre_mmu_init(void);
extern void pre_mmu_init(void);
extern void pre_trap_init(void);
extern void pre_trap_init(void);
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