Commit 12f1bacf authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sme: Implement sysctl to set the default vector length 



As for SVE provide a sysctl which allows the default SME vector length to
be configured.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220419112247.711548-11-broonie@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent b42990d3

arch/arm64/kernel/fpsimd.c

+28 −1
Original line number Diff line number Diff line
@@ -489,6 +489,30 @@ static int __init sve_sysctl_init(void) 
static int __init sve_sysctl_init(void) { return 0; }

#endif /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */



#if defined(CONFIG_ARM64_SME) && defined(CONFIG_SYSCTL)

static struct ctl_table sme_default_vl_table[] = {

	{

		.procname	= "sme_default_vector_length",

		.mode		= 0644,

		.proc_handler	= vec_proc_do_default_vl,

		.extra1		= &vl_info[ARM64_VEC_SME],

	},

	{ }

};



static int __init sme_sysctl_init(void)

{

	if (system_supports_sme())

		if (!register_sysctl("abi", sme_default_vl_table))

			return -EINVAL;



	return 0;

}



#else /* ! (CONFIG_ARM64_SME && CONFIG_SYSCTL) */

static int __init sme_sysctl_init(void) { return 0; }

#endif /* ! (CONFIG_ARM64_SME && CONFIG_SYSCTL) */



#define ZREG(sve_state, vq, n) ((char *)(sve_state) +		\

	(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
@@ -1687,6 +1711,9 @@ static int __init fpsimd_init(void) 
	if (cpu_have_named_feature(SME) && !cpu_have_named_feature(SVE))

		pr_notice("SME is implemented but not SVE\n");



	return sve_sysctl_init();

	sve_sysctl_init();

	sme_sysctl_init();



	return 0;

}

core_initcall(fpsimd_init);