Commit 12ec5408 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'iio-fixes-for-5.12a' of... 

Merge tag 'iio-fixes-for-5.12a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

Jonathan writes:

First set of IIO and counter fixes for the 5.12 cycle

adi,ad7949
* Fix a wrong bitmask that could lead to an undefined bit being included.
adi,adi-axi-adc
* Add missing Kconfig dependencies
adi,adis16400
* Wrong error code handling in adis16400 that could lead to failed probe.
hid-sensor-humidity, temperature
* Fix alignment and space for timestamp channel.
hid-sensor-prox
* Fix an issue with handling of exponent on the channel scaling.
invensense,mpu3050
* Fix a hole in error handling.
qcom,spi-vadc
* Correct scaling
st,ab8500-adc
* Fix wrong scaling (by factor of 1000)
st,stm32-adc
* Add missing HAS_IOMEM dependency
st,stm32-timer-cnt
* Report count when running off internal clock
* Fix issue with not checking ceiling before trying to write to hardware
* Ensure driver doesn't have stashed state which doesn't match hardware by
  rereading from hardware in a slow path.

* tag 'iio-fixes-for-5.12a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
  iio: gyro: mpu3050: Fix error handling in mpu3050_trigger_handler
  iio: hid-sensor-temperature: Fix issues of timestamp channel
  iio: hid-sensor-humidity: Fix alignment issue of timestamp channel
  counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register
  counter: stm32-timer-cnt: fix ceiling write max value
  counter: stm32-timer-cnt: Report count function when SLAVE_MODE_DISABLED
  iio: adc: ab8500-gpadc: Fix off by 10 to 3
  iio:adc:stm32-adc: Add HAS_IOMEM dependency
  iio: adis16400: Fix an error code in adis16400_initial_setup()
  iio: adc: adi-axi-adc: add proper Kconfig dependencies
  iio: adc: ad7949: fix wrong ADC result due to incorrect bit mask
  iio: hid-sensor-prox: Fix scale not correct issue
  iio:adc:qcom-spmi-vadc: add default scale to LR_MUX2_BAT_ID channel
parents 1e28eed1 6dbbbe4c

drivers/counter/stm32-timer-cnt.c

+33 −22
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ struct stm32_timer_cnt { 
	struct counter_device counter;

	struct regmap *regmap;

	struct clk *clk;

	u32 ceiling;

	u32 max_arr;

	bool enabled;

	struct stm32_timer_regs bak;

};
@@ -44,13 +44,14 @@ struct stm32_timer_cnt { 
 * @STM32_COUNT_ENCODER_MODE_3: counts on both TI1FP1 and TI2FP2 edges

 */

enum stm32_count_function {

	STM32_COUNT_SLAVE_MODE_DISABLED = -1,

	STM32_COUNT_SLAVE_MODE_DISABLED,

	STM32_COUNT_ENCODER_MODE_1,

	STM32_COUNT_ENCODER_MODE_2,

	STM32_COUNT_ENCODER_MODE_3,

};



static enum counter_count_function stm32_count_functions[] = {

	[STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_COUNT_FUNCTION_INCREASE,

	[STM32_COUNT_ENCODER_MODE_1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A,

	[STM32_COUNT_ENCODER_MODE_2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B,

	[STM32_COUNT_ENCODER_MODE_3] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4,
@@ -73,8 +74,10 @@ static int stm32_count_write(struct counter_device *counter, 
			     const unsigned long val)

{

	struct stm32_timer_cnt *const priv = counter->priv;

	u32 ceiling;



	if (val > priv->ceiling)

	regmap_read(priv->regmap, TIM_ARR, &ceiling);

	if (val > ceiling)

		return -EINVAL;



	return regmap_write(priv->regmap, TIM_CNT, val);
@@ -90,6 +93,9 @@ static int stm32_count_function_get(struct counter_device *counter, 
	regmap_read(priv->regmap, TIM_SMCR, &smcr);



	switch (smcr & TIM_SMCR_SMS) {

	case 0:

		*function = STM32_COUNT_SLAVE_MODE_DISABLED;

		return 0;

	case 1:

		*function = STM32_COUNT_ENCODER_MODE_1;

		return 0;
@@ -99,10 +105,10 @@ static int stm32_count_function_get(struct counter_device *counter, 
	case 3:

		*function = STM32_COUNT_ENCODER_MODE_3;

		return 0;

	}



	default:

		return -EINVAL;

	}

}



static int stm32_count_function_set(struct counter_device *counter,

				    struct counter_count *count,
@@ -112,6 +118,9 @@ static int stm32_count_function_set(struct counter_device *counter, 
	u32 cr1, sms;



	switch (function) {

	case STM32_COUNT_SLAVE_MODE_DISABLED:

		sms = 0;

		break;

	case STM32_COUNT_ENCODER_MODE_1:

		sms = 1;

		break;
@@ -122,8 +131,7 @@ static int stm32_count_function_set(struct counter_device *counter, 
		sms = 3;

		break;

	default:

		sms = 0;

		break;

		return -EINVAL;

	}



	/* Store enable status */
@@ -131,10 +139,6 @@ static int stm32_count_function_set(struct counter_device *counter, 


	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);



	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */

	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);

	regmap_write(priv->regmap, TIM_ARR, priv->ceiling);



	regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);



	/* Make sure that registers are updated */
@@ -185,11 +189,13 @@ static ssize_t stm32_count_ceiling_write(struct counter_device *counter, 
	if (ret)

		return ret;



	if (ceiling > priv->max_arr)

		return -ERANGE;



	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */

	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);

	regmap_write(priv->regmap, TIM_ARR, ceiling);



	priv->ceiling = ceiling;

	return len;

}
@@ -274,31 +280,36 @@ static int stm32_action_get(struct counter_device *counter, 
	size_t function;

	int err;



	/* Default action mode (e.g. STM32_COUNT_SLAVE_MODE_DISABLED) */

	*action = STM32_SYNAPSE_ACTION_NONE;



	err = stm32_count_function_get(counter, count, &function);

	if (err)

		return 0;

		return err;



	switch (function) {

	case STM32_COUNT_SLAVE_MODE_DISABLED:

		/* counts on internal clock when CEN=1 */

		*action = STM32_SYNAPSE_ACTION_NONE;

		return 0;

	case STM32_COUNT_ENCODER_MODE_1:

		/* counts up/down on TI1FP1 edge depending on TI2FP2 level */

		if (synapse->signal->id == count->synapses[0].signal->id)

			*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;

		break;

		else

			*action = STM32_SYNAPSE_ACTION_NONE;

		return 0;

	case STM32_COUNT_ENCODER_MODE_2:

		/* counts up/down on TI2FP2 edge depending on TI1FP1 level */

		if (synapse->signal->id == count->synapses[1].signal->id)

			*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;

		break;

		else

			*action = STM32_SYNAPSE_ACTION_NONE;

		return 0;

	case STM32_COUNT_ENCODER_MODE_3:

		/* counts up/down on both TI1FP1 and TI2FP2 edges */

		*action = STM32_SYNAPSE_ACTION_BOTH_EDGES;

		break;

	}



		return 0;

	default:

		return -EINVAL;

	}

}



static const struct counter_ops stm32_timer_cnt_ops = {
@@ -359,7 +370,7 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev) 


	priv->regmap = ddata->regmap;

	priv->clk = ddata->clk;

	priv->ceiling = ddata->max_arr;

	priv->max_arr = ddata->max_arr;



	priv->counter.name = dev_name(dev);

	priv->counter.parent = dev;

drivers/iio/adc/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -266,6 +266,8 @@ config ADI_AXI_ADC 
	select IIO_BUFFER

	select IIO_BUFFER_HW_CONSUMER

	select IIO_BUFFER_DMAENGINE

	depends on HAS_IOMEM

	depends on OF

	help

	  Say yes here to build support for Analog Devices Generic

	  AXI ADC IP core. The IP core is used for interfacing with
@@ -923,6 +925,7 @@ config STM32_ADC_CORE 
	depends on ARCH_STM32 || COMPILE_TEST

	depends on OF

	depends on REGULATOR

	depends on HAS_IOMEM

	select IIO_BUFFER

	select MFD_STM32_TIMERS

	select IIO_STM32_TIMER_TRIGGER

drivers/iio/adc/ab8500-gpadc.c

+1 −1
Original line number Diff line number Diff line
@@ -918,7 +918,7 @@ static int ab8500_gpadc_read_raw(struct iio_dev *indio_dev, 
			return processed;



		/* Return millivolt or milliamps or millicentigrades */

		*val = processed * 1000;

		*val = processed;

		return IIO_VAL_INT;

	}

drivers/iio/adc/ad7949.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, 
	int ret;

	int i;

	int bits_per_word = ad7949_adc->resolution;

	int mask = GENMASK(ad7949_adc->resolution, 0);

	int mask = GENMASK(ad7949_adc->resolution - 1, 0);

	struct spi_message msg;

	struct spi_transfer tx[] = {

		{

drivers/iio/adc/qcom-spmi-vadc.c

+1 −1
Original line number Diff line number Diff line
@@ -597,7 +597,7 @@ static const struct vadc_channels vadc_chans[] = { 
	VADC_CHAN_NO_SCALE(P_MUX16_1_3, 1)



	VADC_CHAN_NO_SCALE(LR_MUX1_BAT_THERM, 0)

	VADC_CHAN_NO_SCALE(LR_MUX2_BAT_ID, 0)

	VADC_CHAN_VOLT(LR_MUX2_BAT_ID, 0, SCALE_DEFAULT)

	VADC_CHAN_NO_SCALE(LR_MUX3_XO_THERM, 0)

	VADC_CHAN_NO_SCALE(LR_MUX4_AMUX_THM1, 0)

	VADC_CHAN_NO_SCALE(LR_MUX5_AMUX_THM2, 0)