Commit 128888a6 authored by Marc Zyngier's avatar Marc Zyngier Committed by Hector Martin
Browse files

arm64: dts: apple: t8103: Add root port interrupt routing 



Add the interrupt-map properties that are required for INTx
signalling.

Tested-by: default avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarHector Martin <marcan@marcan.st>
parent 3c866bb7

arch/arm64/boot/dts/apple/t8103.dtsi

+30 −3
Original line number Diff line number Diff line
@@ -278,7 +278,7 @@ 
			pinctrl-0 = <&pcie_pins>;

			pinctrl-names = "default";



			pci@0,0 {

			port00: pci@0,0 {

				device_type = "pci";

				reg = <0x0 0x0 0x0 0x0 0x0>;

				reset-gpios = <&pinctrl_ap 152 0>;
@@ -287,9 +287,18 @@ 
				#address-cells = <3>;

				#size-cells = <2>;

				ranges;



				interrupt-controller;

				#interrupt-cells = <1>;



				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &port00 0 0 0 0>,

						<0 0 0 2 &port00 0 0 0 1>,

						<0 0 0 3 &port00 0 0 0 2>,

						<0 0 0 4 &port00 0 0 0 3>;

			};



			pci@1,0 {

			port01: pci@1,0 {

				device_type = "pci";

				reg = <0x800 0x0 0x0 0x0 0x0>;

				reset-gpios = <&pinctrl_ap 153 0>;
@@ -298,9 +307,18 @@ 
				#address-cells = <3>;

				#size-cells = <2>;

				ranges;



				interrupt-controller;

				#interrupt-cells = <1>;



				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &port01 0 0 0 0>,

						<0 0 0 2 &port01 0 0 0 1>,

						<0 0 0 3 &port01 0 0 0 2>,

						<0 0 0 4 &port01 0 0 0 3>;

			};



			pci@2,0 {

			port02: pci@2,0 {

				device_type = "pci";

				reg = <0x1000 0x0 0x0 0x0 0x0>;

				reset-gpios = <&pinctrl_ap 33 0>;
@@ -309,6 +327,15 @@ 
				#address-cells = <3>;

				#size-cells = <2>;

				ranges;



				interrupt-controller;

				#interrupt-cells = <1>;



				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &port02 0 0 0 0>,

						<0 0 0 2 &port02 0 0 0 1>,

						<0 0 0 3 &port02 0 0 0 2>,

						<0 0 0 4 &port02 0 0 0 3>;

			};

		};

	};