Commit 12810cb9 authored by Amelie Delaunay's avatar Amelie Delaunay Committed by Vinod Koul
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dt-bindings: phy: phy-stm32-usbphyc: add #clock-cells property 



usbphyc provides a unique clock called ck_usbo_48m.
STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation.
ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock.

ck_usbo_48m is available as soon as the PLL is enabled.

Signed-off-by: default avatarAmelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210208114659.15269-2-amelie.delaunay@foss.st.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent eb445a15

Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml

+5 −0
Original line number Diff line number Diff line
@@ -51,6 +51,10 @@ properties: 
  vdda1v8-supply:

    description: regulator providing 1V8 power supply to the PLL block



  '#clock-cells':

    description: number of clock cells for ck_usbo_48m consumer

    const: 0



#Required child nodes:



patternProperties:
@@ -120,6 +124,7 @@ examples: 
        vdda1v8-supply = <&reg18>;

        #address-cells = <1>;

        #size-cells = <0>;

        #clock-cells = <0>;



        usbphyc_port0: usb-phy@0 {

            reg = <0>;