Commit 1178ac68 authored by Ian Chen's avatar Ian Chen Committed by Alex Deucher
Browse files

drm/amd/display: Refactor edp ILR caps codes 



We split out ILR config from "global" to "per-panel" config settings.

Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarIan Chen <ian.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7aeb2e47

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+4 −1
Original line number Diff line number Diff line
@@ -1307,7 +1307,10 @@ static bool detect_link_and_local_sink(struct dc_link *link, 
		}



		if (link->connector_signal == SIGNAL_TYPE_EDP) {

			// Init dc_panel_config

			/* Init dc_panel_config by HW config */

			if (dc_ctx->dc->res_pool->funcs->get_panel_config_defaults)

				dc_ctx->dc->res_pool->funcs->get_panel_config_defaults(&link->panel_config);

			/* Pickup base DM settings */

			dm_helpers_init_panel_settings(dc_ctx, &link->panel_config, sink);

			// Override dc_panel_config if system has specific settings

			dm_helpers_override_panel_settings(dc_ctx, &link->panel_config);

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+2 −2
Original line number Diff line number Diff line
@@ -5795,7 +5795,7 @@ void detect_edp_sink_caps(struct dc_link *link) 
	 * Per VESA eDP spec, "The DPCD revision for eDP v1.4 is 13h"

	 */

	if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 &&

			(link->dc->debug.optimize_edp_link_rate ||

			(link->panel_config.ilr.optimize_edp_link_rate ||

			link->reported_link_cap.link_rate == LINK_RATE_UNKNOWN)) {

		// Read DPCD 00010h - 0001Fh 16 bytes at one shot

		core_link_read_dpcd(link, DP_SUPPORTED_LINK_RATES,
@@ -6744,7 +6744,7 @@ bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timin 
	ASSERT(link || crtc_timing); // invalid input



	if (link->dpcd_caps.edp_supported_link_rates_count == 0 ||

			!link->dc->debug.optimize_edp_link_rate)

			!link->panel_config.ilr.optimize_edp_link_rate)

		return false;

drivers/gpu/drm/amd/display/dc/dc.h

+0 −1
Original line number Diff line number Diff line
@@ -821,7 +821,6 @@ struct dc_debug_options { 
	/* Enable dmub aux for legacy ddc */

	bool enable_dmub_aux_for_legacy_ddc;

	bool disable_fams;

	bool optimize_edp_link_rate; /* eDP ILR */

	/* FEC/PSR1 sequence enable delay in 100us */

	uint8_t fec_enable_delay_in100us;

	bool enable_driver_sequence_debug;

drivers/gpu/drm/amd/display/dc/dc_link.h

+4 −0
Original line number Diff line number Diff line
@@ -138,6 +138,10 @@ struct dc_panel_config { 
		bool disable_dsc_edp;

		unsigned int force_dsc_edp_policy;

	} dsc;

	/* eDP ILR */

	struct ilr {

		bool optimize_edp_link_rate; /* eDP ILR */

	} ilr;

};

/*

 * A link contains one or more sinks and their connected status.

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+12 −1
Original line number Diff line number Diff line
@@ -657,7 +657,6 @@ static const struct dc_debug_options debug_defaults_drv = { 
		.usbc_combo_phy_reset_wa = true,

		.dmub_command_table = true,

		.use_max_lb = true,

		.optimize_edp_link_rate = true

};



static const struct dc_debug_options debug_defaults_diags = {
@@ -677,6 +676,12 @@ static const struct dc_debug_options debug_defaults_diags = { 
		.use_max_lb = true

};



static const struct dc_panel_config panel_config_defaults = {

		.ilr = {

			.optimize_edp_link_rate = true,

		},

};



enum dcn20_clk_src_array_id {

	DCN20_CLK_SRC_PLL0,

	DCN20_CLK_SRC_PLL1,
@@ -1367,6 +1372,11 @@ static struct panel_cntl *dcn21_panel_cntl_create(const struct panel_cntl_init_d 
	return &panel_cntl->base;

}



static void dcn21_get_panel_config_defaults(struct dc_panel_config *panel_config)

{

	*panel_config = panel_config_defaults;

}



#define CTX ctx



#define REG(reg_name) \
@@ -1408,6 +1418,7 @@ static const struct resource_funcs dcn21_res_pool_funcs = { 
	.set_mcif_arb_params = dcn20_set_mcif_arb_params,

	.find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link,

	.update_bw_bounding_box = dcn21_update_bw_bounding_box,

	.get_panel_config_defaults = dcn21_get_panel_config_defaults,

};



static bool dcn21_resource_construct(