Unverified Commit 1133a9aa authored by Ranjani Sridharan's avatar Ranjani Sridharan Committed by Mark Brown
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ASoC: SOF: Intel: hda: Restrict DMI L1 disable workaround 



The workaround to disable DMI L1 should be restricted to only the CAVS
IP's.

Signed-off-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarRander Wang <rander.wang@intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230220075804.4829-3-peter.ujfalusi@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent ae9db908

sound/soc/sof/intel/hda-stream.c

+6 −3
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ int hda_dsp_stream_spib_config(struct snd_sof_dev *sdev, 
struct hdac_ext_stream *

hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags)

{

	const struct sof_intel_dsp_desc *chip_info =  get_chip_info(sdev->pdata);

	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;

	struct hdac_bus *bus = sof_to_bus(sdev);

	struct sof_intel_hda_stream *hda_stream;
@@ -221,9 +222,10 @@ hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags) 
	/*

	 * Prevent DMI Link L1 entry for streams that don't support it.

	 * Workaround to address a known issue with host DMA that results

	 * in xruns during pause/release in capture scenarios.

	 * in xruns during pause/release in capture scenarios. This is not needed for the ACE IP.

	 */

	if (!(flags & SOF_HDA_STREAM_DMI_L1_COMPATIBLE)) {

	if (chip_info->hw_ip_version < SOF_INTEL_ACE_1_0 &&

	    !(flags & SOF_HDA_STREAM_DMI_L1_COMPATIBLE)) {

		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,

					HDA_VS_INTEL_EM2,

					HDA_VS_INTEL_EM2_L1SEN, 0);
@@ -236,6 +238,7 @@ hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags) 
/* free a stream */

int hda_dsp_stream_put(struct snd_sof_dev *sdev, int direction, int stream_tag)

{

	const struct sof_intel_dsp_desc *chip_info =  get_chip_info(sdev->pdata);

	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;

	struct hdac_bus *bus = sof_to_bus(sdev);

	struct sof_intel_hda_stream *hda_stream;
@@ -268,7 +271,7 @@ int hda_dsp_stream_put(struct snd_sof_dev *sdev, int direction, int stream_tag) 
	spin_unlock_irq(&bus->reg_lock);



	/* Enable DMI L1 if permitted */

	if (dmi_l1_enable) {

	if (chip_info->hw_ip_version < SOF_INTEL_ACE_1_0 && dmi_l1_enable) {

		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,

					HDA_VS_INTEL_EM2_L1SEN, HDA_VS_INTEL_EM2_L1SEN);

		hda->l1_disabled = false;