Loading arch/riscv/include/asm/csr.h +4 −4 Original line number Diff line number Diff line Loading @@ -17,9 +17,9 @@ #include <linux/const.h> /* Status register flags */ #define SR_IE _AC(0x00000002, UL) /* Interrupt Enable */ #define SR_PIE _AC(0x00000020, UL) /* Previous IE */ #define SR_PS _AC(0x00000100, UL) /* Previously Supervisor */ #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */ #define SR_SUM _AC(0x00040000, UL) /* Supervisor may access User Memory */ #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ Loading arch/riscv/include/asm/irqflags.h +5 −5 Original line number Diff line number Diff line Loading @@ -27,25 +27,25 @@ static inline unsigned long arch_local_save_flags(void) /* unconditionally enable interrupts */ static inline void arch_local_irq_enable(void) { csr_set(sstatus, SR_IE); csr_set(sstatus, SR_SIE); } /* unconditionally disable interrupts */ static inline void arch_local_irq_disable(void) { csr_clear(sstatus, SR_IE); csr_clear(sstatus, SR_SIE); } /* get status and disable interrupts */ static inline unsigned long arch_local_irq_save(void) { return csr_read_clear(sstatus, SR_IE); return csr_read_clear(sstatus, SR_SIE); } /* test flags */ static inline int arch_irqs_disabled_flags(unsigned long flags) { return !(flags & SR_IE); return !(flags & SR_SIE); } /* test hardware interrupt enable bit */ Loading @@ -57,7 +57,7 @@ static inline int arch_irqs_disabled(void) /* set interrupt enabled status */ static inline void arch_local_irq_restore(unsigned long flags) { csr_set(sstatus, flags & SR_IE); csr_set(sstatus, flags & SR_SIE); } #endif /* _ASM_RISCV_IRQFLAGS_H */ arch/riscv/include/asm/ptrace.h +1 −1 Original line number Diff line number Diff line Loading @@ -66,7 +66,7 @@ struct pt_regs { #define REG_FMT "%08lx" #endif #define user_mode(regs) (((regs)->sstatus & SR_PS) == 0) #define user_mode(regs) (((regs)->sstatus & SR_SPP) == 0) /* Helpers for working with the instruction pointer */ Loading arch/riscv/kernel/entry.S +4 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ handle_syscall: addi s2, s2, 0x4 REG_S s2, PT_SEPC(sp) /* System calls run with interrupts enabled */ csrs sstatus, SR_IE csrs sstatus, SR_SIE /* Trace syscalls, but only if requested by the user. */ REG_L t0, TASK_TI_FLAGS(tp) andi t0, t0, _TIF_SYSCALL_TRACE Loading Loading @@ -224,8 +224,8 @@ ret_from_syscall: ret_from_exception: REG_L s0, PT_SSTATUS(sp) csrc sstatus, SR_IE andi s0, s0, SR_PS csrc sstatus, SR_SIE andi s0, s0, SR_SPP bnez s0, restore_all resume_userspace: Loading Loading @@ -255,7 +255,7 @@ work_pending: bnez s1, work_resched work_notifysig: /* Handle pending signals and notify-resume requests */ csrs sstatus, SR_IE /* Enable interrupts for do_notify_resume() */ csrs sstatus, SR_SIE /* Enable interrupts for do_notify_resume() */ move a0, sp /* pt_regs */ move a1, s0 /* current_thread_info->flags */ tail do_notify_resume Loading arch/riscv/kernel/process.c +2 −2 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ void show_regs(struct pt_regs *regs) void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { regs->sstatus = SR_PIE /* User mode, irqs on */ | SR_FS_INITIAL; regs->sstatus = SR_SPIE /* User mode, irqs on */ | SR_FS_INITIAL; regs->sepc = pc; regs->sp = sp; set_fs(USER_DS); Loading Loading @@ -110,7 +110,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, const register unsigned long gp __asm__ ("gp"); memset(childregs, 0, sizeof(struct pt_regs)); childregs->gp = gp; childregs->sstatus = SR_PS | SR_PIE; /* Supervisor, irqs on */ childregs->sstatus = SR_SPP | SR_SPIE; /* Supervisor, irqs on */ p->thread.ra = (unsigned long)ret_from_kernel_thread; p->thread.s[0] = usp; /* fn */ Loading Loading
arch/riscv/include/asm/csr.h +4 −4 Original line number Diff line number Diff line Loading @@ -17,9 +17,9 @@ #include <linux/const.h> /* Status register flags */ #define SR_IE _AC(0x00000002, UL) /* Interrupt Enable */ #define SR_PIE _AC(0x00000020, UL) /* Previous IE */ #define SR_PS _AC(0x00000100, UL) /* Previously Supervisor */ #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */ #define SR_SUM _AC(0x00040000, UL) /* Supervisor may access User Memory */ #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ Loading
arch/riscv/include/asm/irqflags.h +5 −5 Original line number Diff line number Diff line Loading @@ -27,25 +27,25 @@ static inline unsigned long arch_local_save_flags(void) /* unconditionally enable interrupts */ static inline void arch_local_irq_enable(void) { csr_set(sstatus, SR_IE); csr_set(sstatus, SR_SIE); } /* unconditionally disable interrupts */ static inline void arch_local_irq_disable(void) { csr_clear(sstatus, SR_IE); csr_clear(sstatus, SR_SIE); } /* get status and disable interrupts */ static inline unsigned long arch_local_irq_save(void) { return csr_read_clear(sstatus, SR_IE); return csr_read_clear(sstatus, SR_SIE); } /* test flags */ static inline int arch_irqs_disabled_flags(unsigned long flags) { return !(flags & SR_IE); return !(flags & SR_SIE); } /* test hardware interrupt enable bit */ Loading @@ -57,7 +57,7 @@ static inline int arch_irqs_disabled(void) /* set interrupt enabled status */ static inline void arch_local_irq_restore(unsigned long flags) { csr_set(sstatus, flags & SR_IE); csr_set(sstatus, flags & SR_SIE); } #endif /* _ASM_RISCV_IRQFLAGS_H */
arch/riscv/include/asm/ptrace.h +1 −1 Original line number Diff line number Diff line Loading @@ -66,7 +66,7 @@ struct pt_regs { #define REG_FMT "%08lx" #endif #define user_mode(regs) (((regs)->sstatus & SR_PS) == 0) #define user_mode(regs) (((regs)->sstatus & SR_SPP) == 0) /* Helpers for working with the instruction pointer */ Loading
arch/riscv/kernel/entry.S +4 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ handle_syscall: addi s2, s2, 0x4 REG_S s2, PT_SEPC(sp) /* System calls run with interrupts enabled */ csrs sstatus, SR_IE csrs sstatus, SR_SIE /* Trace syscalls, but only if requested by the user. */ REG_L t0, TASK_TI_FLAGS(tp) andi t0, t0, _TIF_SYSCALL_TRACE Loading Loading @@ -224,8 +224,8 @@ ret_from_syscall: ret_from_exception: REG_L s0, PT_SSTATUS(sp) csrc sstatus, SR_IE andi s0, s0, SR_PS csrc sstatus, SR_SIE andi s0, s0, SR_SPP bnez s0, restore_all resume_userspace: Loading Loading @@ -255,7 +255,7 @@ work_pending: bnez s1, work_resched work_notifysig: /* Handle pending signals and notify-resume requests */ csrs sstatus, SR_IE /* Enable interrupts for do_notify_resume() */ csrs sstatus, SR_SIE /* Enable interrupts for do_notify_resume() */ move a0, sp /* pt_regs */ move a1, s0 /* current_thread_info->flags */ tail do_notify_resume Loading
arch/riscv/kernel/process.c +2 −2 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ void show_regs(struct pt_regs *regs) void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { regs->sstatus = SR_PIE /* User mode, irqs on */ | SR_FS_INITIAL; regs->sstatus = SR_SPIE /* User mode, irqs on */ | SR_FS_INITIAL; regs->sepc = pc; regs->sp = sp; set_fs(USER_DS); Loading Loading @@ -110,7 +110,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, const register unsigned long gp __asm__ ("gp"); memset(childregs, 0, sizeof(struct pt_regs)); childregs->gp = gp; childregs->sstatus = SR_PS | SR_PIE; /* Supervisor, irqs on */ childregs->sstatus = SR_SPP | SR_SPIE; /* Supervisor, irqs on */ p->thread.ra = (unsigned long)ret_from_kernel_thread; p->thread.s[0] = usp; /* fn */ Loading