Commit 11120e93 authored by Yangtao Li's avatar Yangtao Li Committed by Rob Clark
Browse files

drm/msm: Convert to use resource-managed OPP API 



Use resource-managed OPP API to simplify code.

Signed-off-by: default avatarYangtao Li <tiny.windzz@gmail.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210314163408.22292-12-digetx@gmail.com


Reviewed-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 46188352

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -1705,7 +1705,7 @@ static void check_speed_bin(struct device *dev) 
		nvmem_cell_put(cell);

	}



	dev_pm_opp_set_supported_hw(dev, &val, 1);

	devm_pm_opp_set_supported_hw(dev, &val, 1);

}



struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+1 −1
Original line number Diff line number Diff line
@@ -1346,7 +1346,7 @@ static int a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu) 
	 * The GMU handles its own frequency switching so build a list of

	 * available frequencies to send during initialization

	 */

	ret = dev_pm_opp_of_add_table(gmu->dev);

	ret = devm_pm_opp_of_add_table(gmu->dev);

	if (ret) {

		DRM_DEV_ERROR(gmu->dev, "Unable to set the OPP table for the GMU\n");

		return ret;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+3 −8
Original line number Diff line number Diff line
@@ -1339,9 +1339,6 @@ static void a6xx_destroy(struct msm_gpu *gpu) 


	adreno_gpu_cleanup(adreno_gpu);



	if (a6xx_gpu->opp_table)

		dev_pm_opp_put_supported_hw(a6xx_gpu->opp_table);



	kfree(a6xx_gpu);

}
@@ -1474,7 +1471,6 @@ static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse) 
static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,

		u32 revn)

{

	struct opp_table *opp_table;

	u32 supp_hw = UINT_MAX;

	u16 speedbin;

	int ret;
@@ -1497,11 +1493,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu, 
	supp_hw = fuse_to_supp_hw(dev, revn, speedbin);



done:

	opp_table = dev_pm_opp_set_supported_hw(dev, &supp_hw, 1);

	if (IS_ERR(opp_table))

		return PTR_ERR(opp_table);

	ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);

	if (ret)

		return ret;



	a6xx_gpu->opp_table = opp_table;

	return 0;

}

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

+0 −2
Original line number Diff line number Diff line
@@ -33,8 +33,6 @@ struct a6xx_gpu { 
	void *llc_slice;

	void *htw_llc_slice;

	bool have_mmu500;



	struct opp_table *opp_table;

};



#define to_a6xx_gpu(x) container_of(x, struct a6xx_gpu, base)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -841,7 +841,7 @@ static void adreno_get_pwrlevels(struct device *dev, 
	if (!of_find_property(dev->of_node, "operating-points-v2", NULL))

		ret = adreno_get_legacy_pwrlevels(dev);

	else {

		ret = dev_pm_opp_of_add_table(dev);

		ret = devm_pm_opp_of_add_table(dev);

		if (ret)

			DRM_DEV_ERROR(dev, "Unable to set the OPP table\n");

	}