Loading drivers/iommu/intel-iommu.c +15 −9 Original line number Diff line number Diff line Loading @@ -1858,10 +1858,12 @@ static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu, init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); if (!intel_iommu_strict) { err = init_iova_flush_queue(&domain->iovad, iommu_flush_iova, iova_entry_free); if (err) return err; } domain_reserve_special_ranges(domain); Loading Loading @@ -5199,6 +5201,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; int ret; switch (type) { case IOMMU_DOMAIN_DMA: Loading @@ -5215,12 +5218,15 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) return NULL; } if (type == IOMMU_DOMAIN_DMA && init_iova_flush_queue(&dmar_domain->iovad, iommu_flush_iova, iova_entry_free)) { if (!intel_iommu_strict && type == IOMMU_DOMAIN_DMA) { ret = init_iova_flush_queue(&dmar_domain->iovad, iommu_flush_iova, iova_entry_free); if (ret) { pr_warn("iova flush queue initialization failed\n"); intel_iommu_strict = 1; } } domain_update_iommu_cap(dmar_domain); Loading Loading
drivers/iommu/intel-iommu.c +15 −9 Original line number Diff line number Diff line Loading @@ -1858,10 +1858,12 @@ static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu, init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); if (!intel_iommu_strict) { err = init_iova_flush_queue(&domain->iovad, iommu_flush_iova, iova_entry_free); if (err) return err; } domain_reserve_special_ranges(domain); Loading Loading @@ -5199,6 +5201,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; int ret; switch (type) { case IOMMU_DOMAIN_DMA: Loading @@ -5215,12 +5218,15 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) return NULL; } if (type == IOMMU_DOMAIN_DMA && init_iova_flush_queue(&dmar_domain->iovad, iommu_flush_iova, iova_entry_free)) { if (!intel_iommu_strict && type == IOMMU_DOMAIN_DMA) { ret = init_iova_flush_queue(&dmar_domain->iovad, iommu_flush_iova, iova_entry_free); if (ret) { pr_warn("iova flush queue initialization failed\n"); intel_iommu_strict = 1; } } domain_update_iommu_cap(dmar_domain); Loading