Loading arch/x86/include/asm/kvm_host.h +1 −1 Original line number Diff line number Diff line Loading @@ -624,7 +624,7 @@ int kvm_pic_set_irq(void *opaque, int irq, int level); void kvm_inject_nmi(struct kvm_vcpu *vcpu); void fx_init(struct kvm_vcpu *vcpu); int fx_init(struct kvm_vcpu *vcpu); void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, Loading arch/x86/kvm/svm.c +6 −1 Original line number Diff line number Diff line Loading @@ -904,13 +904,18 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) svm->asid_generation = 0; init_vmcb(svm); fx_init(&svm->vcpu); err = fx_init(&svm->vcpu); if (err) goto free_page4; svm->vcpu.arch.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE; if (kvm_vcpu_is_bsp(&svm->vcpu)) svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP; return &svm->vcpu; free_page4: __free_page(hsave_page); free_page3: __free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER); free_page2: Loading arch/x86/kvm/vmx.c +3 −1 Original line number Diff line number Diff line Loading @@ -2659,7 +2659,9 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu) msr |= MSR_IA32_APICBASE_BSP; kvm_set_apic_base(&vmx->vcpu, msr); fx_init(&vmx->vcpu); ret = fx_init(&vmx->vcpu); if (ret != 0) goto out; seg_setup(VCPU_SREG_CS); /* Loading arch/x86/kvm/x86.c +9 −2 Original line number Diff line number Diff line Loading @@ -5114,12 +5114,19 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) return 0; } void fx_init(struct kvm_vcpu *vcpu) int fx_init(struct kvm_vcpu *vcpu) { fpu_alloc(&vcpu->arch.guest_fpu); int err; err = fpu_alloc(&vcpu->arch.guest_fpu); if (err) return err; fpu_finit(&vcpu->arch.guest_fpu); vcpu->arch.cr0 |= X86_CR0_ET; return 0; } EXPORT_SYMBOL_GPL(fx_init); Loading Loading
arch/x86/include/asm/kvm_host.h +1 −1 Original line number Diff line number Diff line Loading @@ -624,7 +624,7 @@ int kvm_pic_set_irq(void *opaque, int irq, int level); void kvm_inject_nmi(struct kvm_vcpu *vcpu); void fx_init(struct kvm_vcpu *vcpu); int fx_init(struct kvm_vcpu *vcpu); void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, Loading
arch/x86/kvm/svm.c +6 −1 Original line number Diff line number Diff line Loading @@ -904,13 +904,18 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) svm->asid_generation = 0; init_vmcb(svm); fx_init(&svm->vcpu); err = fx_init(&svm->vcpu); if (err) goto free_page4; svm->vcpu.arch.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE; if (kvm_vcpu_is_bsp(&svm->vcpu)) svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP; return &svm->vcpu; free_page4: __free_page(hsave_page); free_page3: __free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER); free_page2: Loading
arch/x86/kvm/vmx.c +3 −1 Original line number Diff line number Diff line Loading @@ -2659,7 +2659,9 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu) msr |= MSR_IA32_APICBASE_BSP; kvm_set_apic_base(&vmx->vcpu, msr); fx_init(&vmx->vcpu); ret = fx_init(&vmx->vcpu); if (ret != 0) goto out; seg_setup(VCPU_SREG_CS); /* Loading
arch/x86/kvm/x86.c +9 −2 Original line number Diff line number Diff line Loading @@ -5114,12 +5114,19 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) return 0; } void fx_init(struct kvm_vcpu *vcpu) int fx_init(struct kvm_vcpu *vcpu) { fpu_alloc(&vcpu->arch.guest_fpu); int err; err = fpu_alloc(&vcpu->arch.guest_fpu); if (err) return err; fpu_finit(&vcpu->arch.guest_fpu); vcpu->arch.cr0 |= X86_CR0_ET; return 0; } EXPORT_SYMBOL_GPL(fx_init); Loading