Commit 101bd907 authored by Ricky WU's avatar Ricky WU Committed by Greg Kroah-Hartman
Browse files

misc: rtsx: judge ASPM Mode to set PETXCFG Reg 



ASPM Mode is ASPM_MODE_CFG need to judge the value of clkreq_0
to set HIGH or LOW, if the ASPM Mode is ASPM_MODE_REG
always set to HIGH during the initialization.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarRicky Wu <ricky_wu@realtek.com>
Link: https://lore.kernel.org/r/52906c6836374c8cb068225954c5543a@realtek.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent adb9743d

drivers/misc/cardreader/rts5227.c

+1 −1
Original line number Diff line number Diff line
@@ -195,7 +195,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) 
		}

	}



	if (option->force_clkreq_0)

	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)

		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,

				FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);

	else

drivers/misc/cardreader/rts5228.c

+0 −18
Original line number Diff line number Diff line
@@ -435,17 +435,10 @@ static void rts5228_init_from_cfg(struct rtsx_pcr *pcr) 
			option->ltr_enabled = false;

		}

	}



	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN

				| PM_L1_1_EN | PM_L1_2_EN))

		option->force_clkreq_0 = false;

	else

		option->force_clkreq_0 = true;

}



static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)

{

	struct rtsx_cr_option *option = &pcr->option;



	rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,

			CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
@@ -476,17 +469,6 @@ static int rts5228_extra_init_hw(struct rtsx_pcr *pcr) 
	else

		rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);



	/*

	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced

	 * to drive low, and we forcibly request clock.

	 */

	if (option->force_clkreq_0)

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);

	else

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);



	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);



	if (pcr->rtd3_en) {

drivers/misc/cardreader/rts5249.c

+1 −2
Original line number Diff line number Diff line
@@ -327,12 +327,11 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) 
		}

	}





	/*

	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced

	 * to drive low, and we forcibly request clock.

	 */

	if (option->force_clkreq_0)

	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)

		rtsx_pci_write_register(pcr, PETXCFG,

			FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);

	else

drivers/misc/cardreader/rts5260.c

+0 −18
Original line number Diff line number Diff line
@@ -517,17 +517,10 @@ static void rts5260_init_from_cfg(struct rtsx_pcr *pcr) 
			option->ltr_enabled = false;

		}

	}



	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN

				| PM_L1_1_EN | PM_L1_2_EN))

		option->force_clkreq_0 = false;

	else

		option->force_clkreq_0 = true;

}



static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)

{

	struct rtsx_cr_option *option = &pcr->option;



	/* Set mcu_cnt to 7 to ensure data can be sampled properly */

	rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
@@ -546,17 +539,6 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr) 


	rts5260_init_hw(pcr);



	/*

	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced

	 * to drive low, and we forcibly request clock.

	 */

	if (option->force_clkreq_0)

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);

	else

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);



	rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);



	return 0;

drivers/misc/cardreader/rts5261.c

+0 −18
Original line number Diff line number Diff line
@@ -498,17 +498,10 @@ static void rts5261_init_from_cfg(struct rtsx_pcr *pcr) 
			option->ltr_enabled = false;

		}

	}



	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN

				| PM_L1_1_EN | PM_L1_2_EN))

		option->force_clkreq_0 = false;

	else

		option->force_clkreq_0 = true;

}



static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)

{

	struct rtsx_cr_option *option = &pcr->option;

	u32 val;



	rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
@@ -554,17 +547,6 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr) 
	else

		rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);



	/*

	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced

	 * to drive low, and we forcibly request clock.

	 */

	if (option->force_clkreq_0)

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);

	else

		rtsx_pci_write_register(pcr, PETXCFG,

				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);



	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);



	if (pcr->rtd3_en) {