Commit 1007337f authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/irq: add dg1_de_irq_postinstall() 



Add a dedicated de postinstall function.

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/cb6bb860fb7596d6b37c3e1e4c7657064d2d747a.1691509966.git.jani.nikula@intel.com
parent 1486d040

drivers/gpu/drm/i915/display/intel_display_irq.c

+16 −1
Original line number Diff line number Diff line
@@ -1666,7 +1666,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) 
	}

}



void mtp_irq_postinstall(struct drm_i915_private *i915)

static void mtp_irq_postinstall(struct drm_i915_private *i915)

{

	struct intel_uncore *uncore = &i915->uncore;

	u32 sde_mask = SDE_GMBUS_ICP | SDE_PICAINTERRUPT;
@@ -1699,6 +1699,21 @@ void gen11_de_irq_postinstall(struct drm_i915_private *dev_priv) 
			   GEN11_DISPLAY_IRQ_ENABLE);

}



void dg1_de_irq_postinstall(struct drm_i915_private *i915)

{

	if (!HAS_DISPLAY(i915))

		return;



	if (DISPLAY_VER(i915) >= 14)

		mtp_irq_postinstall(i915);

	else

		icp_irq_postinstall(i915);



	gen8_de_irq_postinstall(i915);

	intel_uncore_write(&i915->uncore, GEN11_DISPLAY_INT_CTL,

			   GEN11_DISPLAY_IRQ_ENABLE);

}



void intel_display_irq_init(struct drm_i915_private *i915)

{

	i915->drm.vblank_disable_immediate = true;

drivers/gpu/drm/i915/display/intel_display_irq.h

+1 −1
Original line number Diff line number Diff line
@@ -62,8 +62,8 @@ void ibx_irq_postinstall(struct drm_i915_private *i915); 
void vlv_display_irq_postinstall(struct drm_i915_private *i915);

void icp_irq_postinstall(struct drm_i915_private *i915);

void gen8_de_irq_postinstall(struct drm_i915_private *i915);

void mtp_irq_postinstall(struct drm_i915_private *i915);

void gen11_de_irq_postinstall(struct drm_i915_private *i915);

void dg1_de_irq_postinstall(struct drm_i915_private *i915);



u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe);

void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);

drivers/gpu/drm/i915/i915_irq.c

+1 −10
Original line number Diff line number Diff line
@@ -869,16 +869,7 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv) 


	GEN3_IRQ_INIT(uncore, GEN11_GU_MISC_, ~gu_misc_masked, gu_misc_masked);



	if (HAS_DISPLAY(dev_priv)) {

		if (DISPLAY_VER(dev_priv) >= 14)

			mtp_irq_postinstall(dev_priv);

		else

			icp_irq_postinstall(dev_priv);



		gen8_de_irq_postinstall(dev_priv);

		intel_uncore_write(&dev_priv->uncore, GEN11_DISPLAY_INT_CTL,

				   GEN11_DISPLAY_IRQ_ENABLE);

	}

	dg1_de_irq_postinstall(dev_priv);



	dg1_master_intr_enable(intel_uncore_regs(uncore));

	intel_uncore_posting_read(uncore, DG1_MSTR_TILE_INTR);