Commit 0fcde598 authored by Davidlohr Bueso's avatar Davidlohr Bueso Committed by Vishal Verma
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cxl/memdev: Improve sanitize ABI descriptions



Be more detailed about the CPU cache management situation. The same
goes for both sanitize and secure erase.

Signed-off-by: default avatarDavidlohr Bueso <dave@stgolabs.net>
Link: https://lore.kernel.org/r/20230726051940.3570-2-dave@stgolabs.net


Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarVishal Verma <vishal.l.verma@intel.com>
parent 70d49bbf
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+11 −2
Original line number Diff line number Diff line
@@ -82,7 +82,11 @@ Description:
		whether it resides in persistent capacity, volatile capacity,
		or the LSA, is made permanently unavailable by whatever means
		is appropriate for the media type. This functionality requires
		the device to be not be actively decoding any HPA ranges.
		the device to be disabled, that is, not actively decoding any
		HPA ranges. This permits avoiding explicit global CPU cache
		management, relying instead for it to be done when a region
		transitions between software programmed and hardware committed
		states.


What            /sys/bus/cxl/devices/memX/security/erase
@@ -92,7 +96,12 @@ Contact: linux-cxl@vger.kernel.org
Description:
		(WO) Write a boolean 'true' string value to this attribute to
		secure erase user data by changing the media encryption keys for
		all user data areas of the device.
		all user data areas of the device. This functionality requires
		the device to be disabled, that is, not actively decoding any
		HPA ranges. This permits avoiding explicit global CPU cache
		management, relying instead for it to be done when a region
		transitions between software programmed and hardware committed
		states.


What:		/sys/bus/cxl/devices/memX/firmware/