Loading drivers/net/dsa/qca8k.c +10 −0 Original line number Diff line number Diff line Loading @@ -930,6 +930,16 @@ qca8k_setup(struct dsa_switch *ds) } } /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ if (priv->switch_id == QCA8K_ID_QCA8327) { mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, QCA8K_GLOBAL_FC_GOL_XON_THRES_S | QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S, mask); } /* Setup our port MTUs to match power on defaults */ for (i = 0; i < QCA8K_NUM_PORTS; i++) priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN; Loading drivers/net/dsa/qca8k.h +6 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,12 @@ #define QCA8K_PORT_LOOKUP_STATE GENMASK(18, 16) #define QCA8K_PORT_LOOKUP_LEARN BIT(20) #define QCA8K_REG_GLOBAL_FC_THRESH 0x800 #define QCA8K_GLOBAL_FC_GOL_XON_THRES(x) ((x) << 16) #define QCA8K_GLOBAL_FC_GOL_XON_THRES_S GENMASK(24, 16) #define QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x) ((x) << 0) #define QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S GENMASK(8, 0) #define QCA8K_REG_PORT_HOL_CTRL0(_i) (0x970 + (_i) * 0x8) #define QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF GENMASK(3, 0) #define QCA8K_PORT_HOL_CTRL0_EG_PRI0(x) ((x) << 0) Loading Loading
drivers/net/dsa/qca8k.c +10 −0 Original line number Diff line number Diff line Loading @@ -930,6 +930,16 @@ qca8k_setup(struct dsa_switch *ds) } } /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ if (priv->switch_id == QCA8K_ID_QCA8327) { mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, QCA8K_GLOBAL_FC_GOL_XON_THRES_S | QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S, mask); } /* Setup our port MTUs to match power on defaults */ for (i = 0; i < QCA8K_NUM_PORTS; i++) priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN; Loading
drivers/net/dsa/qca8k.h +6 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,12 @@ #define QCA8K_PORT_LOOKUP_STATE GENMASK(18, 16) #define QCA8K_PORT_LOOKUP_LEARN BIT(20) #define QCA8K_REG_GLOBAL_FC_THRESH 0x800 #define QCA8K_GLOBAL_FC_GOL_XON_THRES(x) ((x) << 16) #define QCA8K_GLOBAL_FC_GOL_XON_THRES_S GENMASK(24, 16) #define QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x) ((x) << 0) #define QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S GENMASK(8, 0) #define QCA8K_REG_PORT_HOL_CTRL0(_i) (0x970 + (_i) * 0x8) #define QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF GENMASK(3, 0) #define QCA8K_PORT_HOL_CTRL0_EG_PRI0(x) ((x) << 0) Loading