Commit 0fbbfb0b authored by Chukun Pan's avatar Chukun Pan Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Enable PCIe controller on rock3a 



Add the nodes to enable the PCIe controller on the
Radxa ROCK3 Model A board. Run test with the MT7921
pcie wireless card.

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20220726023516.6487-1-amadeus@jmu.edu.cn


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 1b8d4233

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts

+34 −0
Original line number Diff line number Diff line
@@ -67,6 +67,18 @@ 
		regulator-boot-on;

	};



	vcc3v3_pcie: vcc3v3-pcie-regulator {

		compatible = "regulator-fixed";

		enable-active-high;

		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&pcie_enable_h>;

		regulator-name = "vcc3v3_pcie";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		vin-supply = <&vcc5v0_sys>;

	};



	vcc3v3_sys: vcc3v3-sys {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3_sys";
@@ -173,6 +185,10 @@ 
	status = "okay";

};



&combphy2 {

	status = "okay";

};



&cpu0 {

	cpu-supply = <&vdd_cpu>;

};
@@ -522,6 +538,14 @@ 
	};

};



&pcie2x1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pcie_reset_h>;

	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;

	vpcie3v3-supply = <&vcc3v3_pcie>;

	status = "okay";

};



&pinctrl {

	cam {

		vcc_cam_en: vcc_cam_en {
@@ -553,6 +577,16 @@ 
		};

	};



	pcie {

		pcie_enable_h: pcie-enable-h {

			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;

		};



		pcie_reset_h: pcie-reset-h {

			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	pmic {

		pmic_int: pmic_int {

			rockchip,pins =