dt-bindings: pwm: Document Synopsys DesignWare snps,pwm-dw-apb-timers-pwm2

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2022 SiFive, Inc.

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Synopsys DW-APB timers PWM controller

maintainers:

  - Ben Dooks <ben.dooks@sifive.com>

description:

  This describes the DesignWare APB timers module when used in the PWM

  mode. The IP core can be generated with various options which can

  control the functionality, the number of PWMs available and other

  internal controls the designer requires.

  The IP block has a version register so this can be used for detection

  instead of having to encode the IP version number in the device tree

  comaptible.

allOf:

  - $ref: pwm.yaml#

properties:

  compatible:

    const: snps,dw-apb-timers-pwm2

  reg:

    maxItems: 1

  "#pwm-cells":

    const: 3

  clocks:

    items:

      - description: Interface bus clock

      - description: PWM reference clock

  clock-names:

    items:

      - const: bus

      - const: timer

  snps,pwm-number:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: The number of PWM channels configured for this instance

    enum: [1, 2, 3, 4, 5, 6, 7, 8]

required:

  - compatible

  - reg

  - "#pwm-cells"

  - clocks

  - clock-names

additionalProperties: false

examples:

  - |

    pwm: pwm@180000 {

      compatible = "snps,dw-apb-timers-pwm2";

      reg = <0x180000 0x200>;

      #pwm-cells = <3>;

      clocks = <&bus>, <&timer>;

      clock-names = "bus", "timer";

    };