Commit 0eedab65 authored by Wolfram Sang's avatar Wolfram Sang Committed by Geert Uytterhoeven
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clk: renesas: r8a779a0: Add CMT clocks 



Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-2-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 95acd758

drivers/clk/renesas/r8a779a0-cpg-mssr.c

+4 −0
Original line number Diff line number Diff line
@@ -233,6 +233,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { 
	DEF_MOD("vspd0",	830,	R8A779A0_CLK_S3D1),

	DEF_MOD("vspd1",	831,	R8A779A0_CLK_S3D1),

	DEF_MOD("rwdt",		907,	R8A779A0_CLK_R),

	DEF_MOD("cmt0",		910,	R8A779A0_CLK_R),

	DEF_MOD("cmt1",		911,	R8A779A0_CLK_R),

	DEF_MOD("cmt2",		912,	R8A779A0_CLK_R),

	DEF_MOD("cmt3",		913,	R8A779A0_CLK_R),

	DEF_MOD("pfc0",		915,	R8A779A0_CLK_CP),

	DEF_MOD("pfc1",		916,	R8A779A0_CLK_CP),

	DEF_MOD("pfc2",		917,	R8A779A0_CLK_CP),