Loading Documentation/devicetree/bindings/net/brcm,amac.txt +1 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ Required properties: - reg-names: Names of the registers. "amac_base": Address and length of the GMAC registers "idm_base": Address and length of the GMAC IDM registers (required for NSP and Northstar2) "nicpm_base": Address and length of the NIC Port Manager registers (required for Northstar2) - interrupts: Interrupt number Loading Documentation/devicetree/bindings/net/brcm,bgmac-nsp.txtdeleted 100644 → 0 +0 −24 Original line number Diff line number Diff line Broadcom GMAC Ethernet Controller Device Tree Bindings ------------------------------------------------------------- Required properties: - compatible: "brcm,bgmac-nsp" - reg: Address and length of the GMAC registers, Address and length of the GMAC IDM registers - reg-names: Names of the registers. Must have both "gmac_base" and "idm_base" - interrupts: Interrupt number Optional properties: - mac-address: See ethernet.txt file in the same directory Examples: gmac0: ethernet@18022000 { compatible = "brcm,bgmac-nsp"; reg = <0x18022000 0x1000>, <0x18110000 0x1000>; reg-names = "gmac_base", "idm_base"; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt +1 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ Required properties: - compatible: Should be one of the following. - "rockchip,rk3066a-efuse" - for RK3066a SoCs. - "rockchip,rk3188-efuse" - for RK3188 SoCs. - "rockchip,rk322x-efuse" - for RK322x SoCs. - "rockchip,rk3228-efuse" - for RK3228 SoCs. - "rockchip,rk3288-efuse" - for RK3288 SoCs. - "rockchip,rk3399-efuse" - for RK3399 SoCs. - reg: Should contain the registers location and exact eFuse size Loading Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt +11 −4 Original line number Diff line number Diff line * Broadcom Digital Timing Engine(DTE) based PTP clock driver * Broadcom Digital Timing Engine(DTE) based PTP clock Required properties: - compatible: should be "brcm,ptp-dte" - compatible: should contain the core compatibility string and the SoC compatibility string. The SoC compatibility string is to handle SoC specific hardware differences. Core compatibility string: "brcm,ptp-dte" SoC compatibility strings: "brcm,iproc-ptp-dte" - for iproc based SoC's - reg: address and length of the DTE block's NCO registers Example: ptp_dte: ptp_dte@180af650 { compatible = "brcm,ptp-dte"; ptp: ptp-dte@180af650 { compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte"; reg = <0x180af650 0x10>; status = "okay"; }; Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +0 −2 Original line number Diff line number Diff line Loading @@ -9,7 +9,6 @@ Optional properties: - fsl,irda-mode : Indicate the uart supports irda mode - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works in DCE mode by default. - fsl,dma-size : Indicate the size of the DMA buffer and its periods Please check Documentation/devicetree/bindings/serial/serial.txt for the complete list of generic properties. Loading @@ -29,5 +28,4 @@ uart1: serial@73fbc000 { interrupts = <31>; uart-has-rtscts; fsl,dte-mode; fsl,dma-size = <1024 4>; }; Loading
Documentation/devicetree/bindings/net/brcm,amac.txt +1 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ Required properties: - reg-names: Names of the registers. "amac_base": Address and length of the GMAC registers "idm_base": Address and length of the GMAC IDM registers (required for NSP and Northstar2) "nicpm_base": Address and length of the NIC Port Manager registers (required for Northstar2) - interrupts: Interrupt number Loading
Documentation/devicetree/bindings/net/brcm,bgmac-nsp.txtdeleted 100644 → 0 +0 −24 Original line number Diff line number Diff line Broadcom GMAC Ethernet Controller Device Tree Bindings ------------------------------------------------------------- Required properties: - compatible: "brcm,bgmac-nsp" - reg: Address and length of the GMAC registers, Address and length of the GMAC IDM registers - reg-names: Names of the registers. Must have both "gmac_base" and "idm_base" - interrupts: Interrupt number Optional properties: - mac-address: See ethernet.txt file in the same directory Examples: gmac0: ethernet@18022000 { compatible = "brcm,bgmac-nsp"; reg = <0x18022000 0x1000>, <0x18110000 0x1000>; reg-names = "gmac_base", "idm_base"; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; };
Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt +1 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ Required properties: - compatible: Should be one of the following. - "rockchip,rk3066a-efuse" - for RK3066a SoCs. - "rockchip,rk3188-efuse" - for RK3188 SoCs. - "rockchip,rk322x-efuse" - for RK322x SoCs. - "rockchip,rk3228-efuse" - for RK3228 SoCs. - "rockchip,rk3288-efuse" - for RK3288 SoCs. - "rockchip,rk3399-efuse" - for RK3399 SoCs. - reg: Should contain the registers location and exact eFuse size Loading
Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt +11 −4 Original line number Diff line number Diff line * Broadcom Digital Timing Engine(DTE) based PTP clock driver * Broadcom Digital Timing Engine(DTE) based PTP clock Required properties: - compatible: should be "brcm,ptp-dte" - compatible: should contain the core compatibility string and the SoC compatibility string. The SoC compatibility string is to handle SoC specific hardware differences. Core compatibility string: "brcm,ptp-dte" SoC compatibility strings: "brcm,iproc-ptp-dte" - for iproc based SoC's - reg: address and length of the DTE block's NCO registers Example: ptp_dte: ptp_dte@180af650 { compatible = "brcm,ptp-dte"; ptp: ptp-dte@180af650 { compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte"; reg = <0x180af650 0x10>; status = "okay"; };
Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +0 −2 Original line number Diff line number Diff line Loading @@ -9,7 +9,6 @@ Optional properties: - fsl,irda-mode : Indicate the uart supports irda mode - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works in DCE mode by default. - fsl,dma-size : Indicate the size of the DMA buffer and its periods Please check Documentation/devicetree/bindings/serial/serial.txt for the complete list of generic properties. Loading @@ -29,5 +28,4 @@ uart1: serial@73fbc000 { interrupts = <31>; uart-has-rtscts; fsl,dte-mode; fsl,dma-size = <1024 4>; };