Commit 0e862838 authored by Alexander Lobakin's avatar Alexander Lobakin Committed by Yury Norov
Browse files

bitops: unify non-atomic bitops prototypes across architectures 



Currently, there is a mess with the prototypes of the non-atomic
bitops across the different architectures:

ret	bool, int, unsigned long
nr	int, long, unsigned int, unsigned long
addr	volatile unsigned long *, volatile void *

Thankfully, it doesn't provoke any bugs, but can sometimes make
the compiler angry when it's not handy at all.
Adjust all the prototypes to the following standard:

ret	bool				retval can be only 0 or 1
nr	unsigned long			native; signed makes no sense
addr	volatile unsigned long *	bitmaps are arrays of ulongs

Next, some architectures don't define 'arch_' versions as they don't
support instrumentation, others do. To make sure there is always the
same set of callables present and to ease any potential future
changes, make them all follow the rule:
 * architecture-specific files define only 'arch_' versions;
 * non-prefixed versions can be defined only in asm-generic files;
and place the non-prefixed definitions into a new file in
asm-generic to be included by non-instrumented architectures.

Finally, add some static assertions in order to prevent people from
making a mess in this room again.
I also used the %__always_inline attribute consistently, so that
they always get resolved to the actual operations.

Suggested-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarAlexander Lobakin <alexandr.lobakin@intel.com>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarYury Norov <yury.norov@gmail.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarYury Norov <yury.norov@gmail.com>
parent 21bb8af5

arch/alpha/include/asm/bitops.h

+17 −15
Original line number Diff line number Diff line
@@ -46,8 +46,8 @@ set_bit(unsigned long nr, volatile void * addr) 
/*

 * WARNING: non atomic version.

 */

static inline void

__set_bit(unsigned long nr, volatile void * addr)

static __always_inline void

arch___set_bit(unsigned long nr, volatile unsigned long *addr)

{

	int *m = ((int *) addr) + (nr >> 5);
@@ -82,8 +82,8 @@ clear_bit_unlock(unsigned long nr, volatile void * addr) 
/*

 * WARNING: non atomic version.

 */

static __inline__ void

__clear_bit(unsigned long nr, volatile void * addr)

static __always_inline void

arch___clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	int *m = ((int *) addr) + (nr >> 5);
@@ -94,7 +94,7 @@ static inline void 
__clear_bit_unlock(unsigned long nr, volatile void * addr)

{

	smp_mb();

	__clear_bit(nr, addr);

	arch___clear_bit(nr, addr);

}



static inline void
@@ -118,8 +118,8 @@ change_bit(unsigned long nr, volatile void * addr) 
/*

 * WARNING: non atomic version.

 */

static __inline__ void

__change_bit(unsigned long nr, volatile void * addr)

static __always_inline void

arch___change_bit(unsigned long nr, volatile unsigned long *addr)

{

	int *m = ((int *) addr) + (nr >> 5);
@@ -186,8 +186,8 @@ test_and_set_bit_lock(unsigned long nr, volatile void *addr) 
/*

 * WARNING: non atomic version.

 */

static inline int

__test_and_set_bit(unsigned long nr, volatile void * addr)

static __always_inline bool

arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long mask = 1 << (nr & 0x1f);

	int *m = ((int *) addr) + (nr >> 5);
@@ -230,8 +230,8 @@ test_and_clear_bit(unsigned long nr, volatile void * addr) 
/*

 * WARNING: non atomic version.

 */

static inline int

__test_and_clear_bit(unsigned long nr, volatile void * addr)

static __always_inline bool

arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long mask = 1 << (nr & 0x1f);

	int *m = ((int *) addr) + (nr >> 5);
@@ -272,8 +272,8 @@ test_and_change_bit(unsigned long nr, volatile void * addr) 
/*

 * WARNING: non atomic version.

 */

static __inline__ int

__test_and_change_bit(unsigned long nr, volatile void * addr)

static __always_inline bool

arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long mask = 1 << (nr & 0x1f);

	int *m = ((int *) addr) + (nr >> 5);
@@ -283,8 +283,8 @@ __test_and_change_bit(unsigned long nr, volatile void * addr) 
	return (old & mask) != 0;

}



static inline int

test_bit(int nr, const volatile void * addr)

static __always_inline bool

arch_test_bit(unsigned long nr, const volatile unsigned long *addr)

{

	return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL;

}
@@ -450,6 +450,8 @@ sched_find_first_bit(const unsigned long b[2]) 
	return __ffs(tmp) + ofs;

}



#include <asm-generic/bitops/non-instrumented-non-atomic.h>



#include <asm-generic/bitops/le.h>



#include <asm-generic/bitops/ext2-atomic-setbit.h>

arch/hexagon/include/asm/bitops.h

+15 −9
Original line number Diff line number Diff line
@@ -127,38 +127,45 @@ static inline void change_bit(int nr, volatile void *addr) 
 * be atomic, particularly for things like slab_lock and slab_unlock.

 *

 */

static inline void __clear_bit(int nr, volatile unsigned long *addr)

static __always_inline void

arch___clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	test_and_clear_bit(nr, addr);

}



static inline void __set_bit(int nr, volatile unsigned long *addr)

static __always_inline void

arch___set_bit(unsigned long nr, volatile unsigned long *addr)

{

	test_and_set_bit(nr, addr);

}



static inline void __change_bit(int nr, volatile unsigned long *addr)

static __always_inline void

arch___change_bit(unsigned long nr, volatile unsigned long *addr)

{

	test_and_change_bit(nr, addr);

}



/*  Apparently, at least some of these are allowed to be non-atomic  */

static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)

static __always_inline bool

arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_clear_bit(nr, addr);

}



static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)

static __always_inline bool

arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_set_bit(nr, addr);

}



static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)

static __always_inline bool

arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_change_bit(nr, addr);

}



static inline int __test_bit(int nr, const volatile unsigned long *addr)

static __always_inline bool

arch_test_bit(unsigned long nr, const volatile unsigned long *addr)

{

	int retval;
@@ -172,8 +179,6 @@ static inline int __test_bit(int nr, const volatile unsigned long *addr) 
	return retval;

}



#define test_bit(nr, addr) __test_bit(nr, addr)



/*

 * ffz - find first zero in word.

 * @word: The word to search
@@ -271,6 +276,7 @@ static inline unsigned long __fls(unsigned long word) 
}



#include <asm-generic/bitops/lock.h>

#include <asm-generic/bitops/non-instrumented-non-atomic.h>



#include <asm-generic/bitops/fls64.h>

#include <asm-generic/bitops/sched.h>

arch/ia64/include/asm/bitops.h

+22 −20
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ set_bit (int nr, volatile void *addr) 
}



/**

 * __set_bit - Set a bit in memory

 * arch___set_bit - Set a bit in memory

 * @nr: the bit to set

 * @addr: the address to start counting from

 *
@@ -61,8 +61,8 @@ set_bit (int nr, volatile void *addr) 
 * If it's called on the same region of memory simultaneously, the effect

 * may be that only one operation succeeds.

 */

static __inline__ void

__set_bit (int nr, volatile void *addr)

static __always_inline void

arch___set_bit(unsigned long nr, volatile unsigned long *addr)

{

	*((__u32 *) addr + (nr >> 5)) |= (1 << (nr & 31));

}
@@ -135,7 +135,7 @@ __clear_bit_unlock(int nr, void *addr) 
}



/**

 * __clear_bit - Clears a bit in memory (non-atomic version)

 * arch___clear_bit - Clears a bit in memory (non-atomic version)

 * @nr: the bit to clear

 * @addr: the address to start counting from

 *
@@ -143,8 +143,8 @@ __clear_bit_unlock(int nr, void *addr) 
 * If it's called on the same region of memory simultaneously, the effect

 * may be that only one operation succeeds.

 */

static __inline__ void

__clear_bit (int nr, volatile void *addr)

static __always_inline void

arch___clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	*((__u32 *) addr + (nr >> 5)) &= ~(1 << (nr & 31));

}
@@ -175,7 +175,7 @@ change_bit (int nr, volatile void *addr) 
}



/**

 * __change_bit - Toggle a bit in memory

 * arch___change_bit - Toggle a bit in memory

 * @nr: the bit to toggle

 * @addr: the address to start counting from

 *
@@ -183,8 +183,8 @@ change_bit (int nr, volatile void *addr) 
 * If it's called on the same region of memory simultaneously, the effect

 * may be that only one operation succeeds.

 */

static __inline__ void

__change_bit (int nr, volatile void *addr)

static __always_inline void

arch___change_bit(unsigned long nr, volatile unsigned long *addr)

{

	*((__u32 *) addr + (nr >> 5)) ^= (1 << (nr & 31));

}
@@ -224,7 +224,7 @@ test_and_set_bit (int nr, volatile void *addr) 
#define test_and_set_bit_lock test_and_set_bit



/**

 * __test_and_set_bit - Set a bit and return its old value

 * arch___test_and_set_bit - Set a bit and return its old value

 * @nr: Bit to set

 * @addr: Address to count from

 *
@@ -232,8 +232,8 @@ test_and_set_bit (int nr, volatile void *addr) 
 * If two examples of this operation race, one can appear to succeed

 * but actually fail.  You must protect multiple accesses with a lock.

 */

static __inline__ int

__test_and_set_bit (int nr, volatile void *addr)

static __always_inline bool

arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)

{

	__u32 *p = (__u32 *) addr + (nr >> 5);

	__u32 m = 1 << (nr & 31);
@@ -269,7 +269,7 @@ test_and_clear_bit (int nr, volatile void *addr) 
}



/**

 * __test_and_clear_bit - Clear a bit and return its old value

 * arch___test_and_clear_bit - Clear a bit and return its old value

 * @nr: Bit to clear

 * @addr: Address to count from

 *
@@ -277,8 +277,8 @@ test_and_clear_bit (int nr, volatile void *addr) 
 * If two examples of this operation race, one can appear to succeed

 * but actually fail.  You must protect multiple accesses with a lock.

 */

static __inline__ int

__test_and_clear_bit(int nr, volatile void * addr)

static __always_inline bool

arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	__u32 *p = (__u32 *) addr + (nr >> 5);

	__u32 m = 1 << (nr & 31);
@@ -314,14 +314,14 @@ test_and_change_bit (int nr, volatile void *addr) 
}



/**

 * __test_and_change_bit - Change a bit and return its old value

 * arch___test_and_change_bit - Change a bit and return its old value

 * @nr: Bit to change

 * @addr: Address to count from

 *

 * This operation is non-atomic and can be reordered.

 */

static __inline__ int

__test_and_change_bit (int nr, void *addr)

static __always_inline bool

arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)

{

	__u32 old, bit = (1 << (nr & 31));

	__u32 *m = (__u32 *) addr + (nr >> 5);
@@ -331,8 +331,8 @@ __test_and_change_bit (int nr, void *addr) 
	return (old & bit) != 0;

}



static __inline__ int

test_bit (int nr, const volatile void *addr)

static __always_inline bool

arch_test_bit(unsigned long nr, const volatile unsigned long *addr)

{

	return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31));

}
@@ -443,6 +443,8 @@ static __inline__ unsigned long __arch_hweight64(unsigned long x) 


#ifdef __KERNEL__



#include <asm-generic/bitops/non-instrumented-non-atomic.h>



#include <asm-generic/bitops/le.h>



#include <asm-generic/bitops/ext2-atomic-setbit.h>

arch/m68k/include/asm/bitops.h

+34 −15
Original line number Diff line number Diff line
@@ -65,8 +65,11 @@ static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) 
				bfset_mem_set_bit(nr, vaddr))

#endif



#define __set_bit(nr, vaddr)	set_bit(nr, vaddr)



static __always_inline void

arch___set_bit(unsigned long nr, volatile unsigned long *addr)

{

	set_bit(nr, addr);

}



static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr)

{
@@ -105,8 +108,11 @@ static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) 
				bfclr_mem_clear_bit(nr, vaddr))

#endif



#define __clear_bit(nr, vaddr)	clear_bit(nr, vaddr)



static __always_inline void

arch___clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	clear_bit(nr, addr);

}



static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr)

{
@@ -145,14 +151,17 @@ static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr) 
				bfchg_mem_change_bit(nr, vaddr))

#endif



#define __change_bit(nr, vaddr)	change_bit(nr, vaddr)





static inline int test_bit(int nr, const volatile unsigned long *vaddr)

static __always_inline void

arch___change_bit(unsigned long nr, volatile unsigned long *addr)

{

	return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;

	change_bit(nr, addr);

}



static __always_inline bool

arch_test_bit(unsigned long nr, const volatile unsigned long *addr)

{

	return (addr[nr >> 5] & (1UL << (nr & 31))) != 0;

}



static inline int bset_reg_test_and_set_bit(int nr,

					    volatile unsigned long *vaddr)
@@ -201,8 +210,11 @@ static inline int bfset_mem_test_and_set_bit(int nr, 
					bfset_mem_test_and_set_bit(nr, vaddr))

#endif



#define __test_and_set_bit(nr, vaddr)	test_and_set_bit(nr, vaddr)



static __always_inline bool

arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_set_bit(nr, addr);

}



static inline int bclr_reg_test_and_clear_bit(int nr,

					      volatile unsigned long *vaddr)
@@ -251,8 +263,11 @@ static inline int bfclr_mem_test_and_clear_bit(int nr, 
					bfclr_mem_test_and_clear_bit(nr, vaddr))

#endif



#define __test_and_clear_bit(nr, vaddr)	test_and_clear_bit(nr, vaddr)



static __always_inline bool

arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_clear_bit(nr, addr);

}



static inline int bchg_reg_test_and_change_bit(int nr,

					       volatile unsigned long *vaddr)
@@ -301,8 +316,11 @@ static inline int bfchg_mem_test_and_change_bit(int nr, 
					bfchg_mem_test_and_change_bit(nr, vaddr))

#endif



#define __test_and_change_bit(nr, vaddr) test_and_change_bit(nr, vaddr)



static __always_inline bool

arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)

{

	return test_and_change_bit(nr, addr);

}



/*

 *	The true 68020 and more advanced processors support the "bfffo"
@@ -522,6 +540,7 @@ static inline int __fls(int x) 
#define clear_bit_unlock	clear_bit

#define __clear_bit_unlock	clear_bit_unlock



#include <asm-generic/bitops/non-instrumented-non-atomic.h>

#include <asm-generic/bitops/ext2-atomic.h>

#include <asm-generic/bitops/fls64.h>

#include <asm-generic/bitops/sched.h>

arch/s390/include/asm/bitops.h

+31 −30
Original line number Diff line number Diff line
@@ -113,75 +113,76 @@ static inline bool arch_test_and_change_bit(unsigned long nr, 
	return old & mask;

}



static inline void arch___set_bit(unsigned long nr, volatile unsigned long *ptr)

static __always_inline void

arch___set_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);



	*addr |= mask;

	*p |= mask;

}



static inline void arch___clear_bit(unsigned long nr,

				    volatile unsigned long *ptr)

static __always_inline void

arch___clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);



	*addr &= ~mask;

	*p &= ~mask;

}



static inline void arch___change_bit(unsigned long nr,

				     volatile unsigned long *ptr)

static __always_inline void

arch___change_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);



	*addr ^= mask;

	*p ^= mask;

}



static inline bool arch___test_and_set_bit(unsigned long nr,

					   volatile unsigned long *ptr)

static __always_inline bool

arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);

	unsigned long old;



	old = *addr;

	*addr |= mask;

	old = *p;

	*p |= mask;

	return old & mask;

}



static inline bool arch___test_and_clear_bit(unsigned long nr,

					     volatile unsigned long *ptr)

static __always_inline bool

arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);

	unsigned long old;



	old = *addr;

	*addr &= ~mask;

	old = *p;

	*p &= ~mask;

	return old & mask;

}



static inline bool arch___test_and_change_bit(unsigned long nr,

					      volatile unsigned long *ptr)

static __always_inline bool

arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)

{

	unsigned long *addr = __bitops_word(nr, ptr);

	unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);

	unsigned long old;



	old = *addr;

	*addr ^= mask;

	old = *p;

	*p ^= mask;

	return old & mask;

}



static inline bool arch_test_bit(unsigned long nr,

				 const volatile unsigned long *ptr)

static __always_inline bool

arch_test_bit(unsigned long nr, const volatile unsigned long *addr)

{

	const volatile unsigned long *addr = __bitops_word(nr, ptr);

	const volatile unsigned long *p = __bitops_word(nr, addr);

	unsigned long mask = __bitops_mask(nr);



	return *addr & mask;

	return *p & mask;

}



static inline bool arch_test_and_set_bit_lock(unsigned long nr,