Commit 0e628ad2 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/optprobes: use PPC_RAW_ macros 



Use PPC_RAW_ macros to simplify the code.

And use PPC_LO/PPC_HI instead of IMM_L/IMM_H which are for
internal use inside ppc-opcode.h

Those macros are self explanatory, comments can go as well.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/5a167b8ba4d33a5c09cd504f0c862e25ffe85459.1621516826.git.christophe.leroy@csgroup.eu
parent f38adf86

arch/powerpc/include/asm/ppc-opcode.h

+5 −6
Original line number Diff line number Diff line
@@ -287,9 +287,6 @@ 
#define PPC_INST_ADDIS			0x3c000000

#define PPC_INST_ADD			0x7c000214

#define PPC_INST_DIVD			0x7c0003d2

#define PPC_INST_RLDICR			0x78000004

#define PPC_INST_ORI			0x60000000

#define PPC_INST_ORIS			0x64000000

#define PPC_INST_BRANCH			0x48000000

#define PPC_INST_BL			0x48000001

#define PPC_INST_BRANCH_COND		0x40800000
@@ -349,6 +346,8 @@ 
#define PPC_LO(v)	((v) & 0xffff)

#define PPC_HI(v)	(((v) >> 16) & 0xffff)

#define PPC_HA(v)	PPC_HI((v) + 0x8000)

#define PPC_HIGHER(v)	(((v) >> 32) & 0xffff)

#define PPC_HIGHEST(v)	(((v) >> 48) & 0xffff)



/*

 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
@@ -530,8 +529,8 @@ 
#define PPC_RAW_AND_DOT(d, a, b)	(0x7c000039 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_OR(d, a, b)		(0x7c000378 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_MR(d, a)		PPC_RAW_OR(d, a, a)

#define PPC_RAW_ORI(d, a, i)		(PPC_INST_ORI | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_ORIS(d, a, i)		(PPC_INST_ORIS | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_ORI(d, a, i)		(0x60000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_ORIS(d, a, i)		(0x64000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_NOR(d, a, b)		(0x7c0000f8 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_XOR(d, a, b)		(0x7c000278 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_XORI(d, a, i)		(0x68000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
@@ -550,7 +549,7 @@ 
					(0x54000001 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))

#define PPC_RAW_RLWIMI(d, a, i, mb, me) (0x50000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))

#define PPC_RAW_RLDICL(d, a, i, mb)     (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb))

#define PPC_RAW_RLDICR(d, a, i, me)     (PPC_INST_RLDICR | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me))

#define PPC_RAW_RLDICR(d, a, i, me)     (0x78000004 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me))



/* slwi = rlwinm Rx, Ry, n, 0, 31-n */

#define PPC_RAW_SLWI(d, a, i)		PPC_RAW_RLWINM(d, a, i, 0, 31-(i))

arch/powerpc/kernel/optprobes.c

+7 −32
Original line number Diff line number Diff line
@@ -126,10 +126,8 @@ void arch_remove_optimized_kprobe(struct optimized_kprobe *op) 


static void patch_imm32_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)

{

	patch_instruction(addr, ppc_inst(PPC_RAW_LIS(reg, IMM_H(val))));

	addr++;



	patch_instruction(addr, ppc_inst(PPC_RAW_ORI(reg, reg, IMM_L(val))));

	patch_instruction(addr++, ppc_inst(PPC_RAW_LIS(reg, PPC_HI(val))));

	patch_instruction(addr, ppc_inst(PPC_RAW_ORI(reg, reg, PPC_LO(val))));

}



/*
@@ -138,34 +136,11 @@ static void patch_imm32_load_insns(unsigned long val, int reg, kprobe_opcode_t * 
 */

static void patch_imm64_load_insns(unsigned long long val, int reg, kprobe_opcode_t *addr)

{

	/* lis reg,(op)@highest */

	patch_instruction(addr,

			  ppc_inst(PPC_INST_ADDIS | ___PPC_RT(reg) |

				   ((val >> 48) & 0xffff)));

	addr++;



	/* ori reg,reg,(op)@higher */

	patch_instruction(addr,

			  ppc_inst(PPC_INST_ORI | ___PPC_RA(reg) |

				   ___PPC_RS(reg) | ((val >> 32) & 0xffff)));

	addr++;



	/* rldicr reg,reg,32,31 */

	patch_instruction(addr,

			  ppc_inst(PPC_INST_RLDICR | ___PPC_RA(reg) |

				   ___PPC_RS(reg) | __PPC_SH64(32) | __PPC_ME64(31)));

	addr++;



	/* oris reg,reg,(op)@h */

	patch_instruction(addr,

			  ppc_inst(PPC_INST_ORIS | ___PPC_RA(reg) |

				   ___PPC_RS(reg) | ((val >> 16) & 0xffff)));

	addr++;



	/* ori reg,reg,(op)@l */

	patch_instruction(addr,

			  ppc_inst(PPC_INST_ORI | ___PPC_RA(reg) |

				   ___PPC_RS(reg) | (val & 0xffff)));

	patch_instruction(addr++, ppc_inst(PPC_RAW_LIS(reg, PPC_HIGHEST(val))));

	patch_instruction(addr++, ppc_inst(PPC_RAW_ORI(reg, reg, PPC_HIGHER(val))));

	patch_instruction(addr++, ppc_inst(PPC_RAW_SLDI(reg, reg, 32)));

	patch_instruction(addr++, ppc_inst(PPC_RAW_ORIS(reg, reg, PPC_HI(val))));

	patch_instruction(addr, ppc_inst(PPC_RAW_ORI(reg, reg, PPC_LO(val))));

}



static void patch_imm_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)