Commit 0dfa6f6e authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/keystone'

- Add register offset for ti,syscon-pcie-id and ti,syscon-pcie-mode DT
  properties (Kishon Vijay Abraham I)

* remotes/lorenzo/pci/keystone:
  PCI: keystone: Use phandle argument from "ti,syscon-pcie-id"/"ti,syscon-pcie-mode"
  dt-bindings: PCI: ti,am65: Fix "ti,syscon-pcie-id"/"ti,syscon-pcie-mode" to take argument
parents 6553ff3d 7dcf07ac
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+6 −2
Original line number Diff line number Diff line
@@ -32,8 +32,12 @@ properties:
    maxItems: 1

  ti,syscon-pcie-mode:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: Phandle to the SYSCON entry
          - description: pcie_ctrl register offset within SYSCON
    description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
    $ref: /schemas/types.yaml#/definitions/phandle

  interrupts:
    minItems: 1
@@ -65,7 +69,7 @@ examples:
               <0x5506000 0x1000>;
        reg-names = "app", "dbics", "addr_space", "atu";
        power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
        ti,syscon-pcie-mode = <&pcie0_mode>;
        ti,syscon-pcie-mode = <&scm_conf 0x4060>;
        num-ib-windows = <16>;
        num-ob-windows = <16>;
        max-link-speed = <2>;
+12 −4
Original line number Diff line number Diff line
@@ -33,12 +33,20 @@ properties:
    maxItems: 1

  ti,syscon-pcie-id:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: Phandle to the SYSCON entry
          - description: pcie_device_id register offset within SYSCON
    description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID
    $ref: /schemas/types.yaml#/definitions/phandle

  ti,syscon-pcie-mode:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: Phandle to the SYSCON entry
          - description: pcie_ctrl register offset within SYSCON
    description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
    $ref: /schemas/types.yaml#/definitions/phandle

  msi-map: true

@@ -84,8 +92,8 @@ examples:
        #size-cells = <2>;
        ranges = <0x81000000 0 0          0x10020000 0 0x00010000>,
                 <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>;
        ti,syscon-pcie-id = <&pcie_devid>;
        ti,syscon-pcie-mode = <&pcie0_mode>;
        ti,syscon-pcie-id = <&scm_conf 0x0210>;
        ti,syscon-pcie-mode = <&scm_conf 0x4060>;
        bus-range = <0x0 0xff>;
        num-viewport = <16>;
        max-link-speed = <2>;
+24 −3
Original line number Diff line number Diff line
@@ -775,12 +775,19 @@ static int __init ks_pcie_init_id(struct keystone_pcie *ks_pcie)
	struct dw_pcie *pci = ks_pcie->pci;
	struct device *dev = pci->dev;
	struct device_node *np = dev->of_node;
	struct of_phandle_args args;
	unsigned int offset = 0;

	devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-id");
	if (IS_ERR(devctrl_regs))
		return PTR_ERR(devctrl_regs);

	ret = regmap_read(devctrl_regs, 0, &id);
	/* Do not error out to maintain old DT compatibility */
	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-id", 1, 0, &args);
	if (!ret)
		offset = args.args[0];

	ret = regmap_read(devctrl_regs, offset, &id);
	if (ret)
		return ret;

@@ -989,6 +996,8 @@ static int ks_pcie_enable_phy(struct keystone_pcie *ks_pcie)
static int ks_pcie_set_mode(struct device *dev)
{
	struct device_node *np = dev->of_node;
	struct of_phandle_args args;
	unsigned int offset = 0;
	struct regmap *syscon;
	u32 val;
	u32 mask;
@@ -998,10 +1007,15 @@ static int ks_pcie_set_mode(struct device *dev)
	if (IS_ERR(syscon))
		return 0;

	/* Do not error out to maintain old DT compatibility */
	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args);
	if (!ret)
		offset = args.args[0];

	mask = KS_PCIE_DEV_TYPE_MASK | KS_PCIE_SYSCLOCKOUTEN;
	val = KS_PCIE_DEV_TYPE(RC) | KS_PCIE_SYSCLOCKOUTEN;

	ret = regmap_update_bits(syscon, 0, mask, val);
	ret = regmap_update_bits(syscon, offset, mask, val);
	if (ret) {
		dev_err(dev, "failed to set pcie mode\n");
		return ret;
@@ -1014,6 +1028,8 @@ static int ks_pcie_am654_set_mode(struct device *dev,
				  enum dw_pcie_device_mode mode)
{
	struct device_node *np = dev->of_node;
	struct of_phandle_args args;
	unsigned int offset = 0;
	struct regmap *syscon;
	u32 val;
	u32 mask;
@@ -1023,6 +1039,11 @@ static int ks_pcie_am654_set_mode(struct device *dev,
	if (IS_ERR(syscon))
		return 0;

	/* Do not error out to maintain old DT compatibility */
	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args);
	if (!ret)
		offset = args.args[0];

	mask = AM654_PCIE_DEV_TYPE_MASK;

	switch (mode) {
@@ -1037,7 +1058,7 @@ static int ks_pcie_am654_set_mode(struct device *dev,
		return -EINVAL;
	}

	ret = regmap_update_bits(syscon, 0, mask, val);
	ret = regmap_update_bits(syscon, offset, mask, val);
	if (ret) {
		dev_err(dev, "failed to set pcie mode\n");
		return ret;