Loading arch/mips/include/asm/cpu.h +7 −0 Original line number Diff line number Diff line Loading @@ -113,6 +113,12 @@ #define PRID_IMP_BCM4710 0x4000 #define PRID_IMP_BCM3302 0x9000 #define PRID_IMP_BCM6338 0x9000 #define PRID_IMP_BCM6345 0x8000 #define PRID_IMP_BCM6348 0x9100 #define PRID_IMP_BCM4350 0xA000 #define PRID_REV_BCM6358 0x0010 #define PRID_REV_BCM6368 0x0030 /* * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM Loading Loading @@ -210,6 +216,7 @@ enum cpu_type_enum { */ CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358, /* * MIPS64 class processors Loading arch/mips/kernel/cpu-probe.c +23 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,9 @@ void __init check_wait(void) case CPU_25KF: case CPU_PR4450: case CPU_BCM3302: case CPU_BCM6338: case CPU_BCM6348: case CPU_BCM6358: case CPU_CAVIUM_OCTEON: cpu_wait = r4k_wait; break; Loading Loading @@ -854,6 +857,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) decode_configs(c); switch (c->processor_id & 0xff00) { case PRID_IMP_BCM3302: /* same as PRID_IMP_BCM6338 */ c->cputype = CPU_BCM3302; __cpu_name[cpu] = "Broadcom BCM3302"; break; Loading @@ -861,6 +865,25 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) c->cputype = CPU_BCM4710; __cpu_name[cpu] = "Broadcom BCM4710"; break; case PRID_IMP_BCM6345: c->cputype = CPU_BCM6345; __cpu_name[cpu] = "Broadcom BCM6345"; break; case PRID_IMP_BCM6348: c->cputype = CPU_BCM6348; __cpu_name[cpu] = "Broadcom BCM6348"; break; case PRID_IMP_BCM4350: switch (c->processor_id & 0xf0) { case PRID_REV_BCM6358: c->cputype = CPU_BCM6358; __cpu_name[cpu] = "Broadcom BCM6358"; break; default: c->cputype = CPU_UNKNOWN; break; } break; } } Loading arch/mips/mm/tlbex.c +4 −0 Original line number Diff line number Diff line Loading @@ -321,6 +321,10 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_BCM3302: case CPU_BCM4710: case CPU_LOONGSON2: case CPU_BCM6338: case CPU_BCM6345: case CPU_BCM6348: case CPU_BCM6358: case CPU_R5500: if (m4kc_tlbp_war()) uasm_i_nop(p); Loading Loading
arch/mips/include/asm/cpu.h +7 −0 Original line number Diff line number Diff line Loading @@ -113,6 +113,12 @@ #define PRID_IMP_BCM4710 0x4000 #define PRID_IMP_BCM3302 0x9000 #define PRID_IMP_BCM6338 0x9000 #define PRID_IMP_BCM6345 0x8000 #define PRID_IMP_BCM6348 0x9100 #define PRID_IMP_BCM4350 0xA000 #define PRID_REV_BCM6358 0x0010 #define PRID_REV_BCM6368 0x0030 /* * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM Loading Loading @@ -210,6 +216,7 @@ enum cpu_type_enum { */ CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358, /* * MIPS64 class processors Loading
arch/mips/kernel/cpu-probe.c +23 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,9 @@ void __init check_wait(void) case CPU_25KF: case CPU_PR4450: case CPU_BCM3302: case CPU_BCM6338: case CPU_BCM6348: case CPU_BCM6358: case CPU_CAVIUM_OCTEON: cpu_wait = r4k_wait; break; Loading Loading @@ -854,6 +857,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) decode_configs(c); switch (c->processor_id & 0xff00) { case PRID_IMP_BCM3302: /* same as PRID_IMP_BCM6338 */ c->cputype = CPU_BCM3302; __cpu_name[cpu] = "Broadcom BCM3302"; break; Loading @@ -861,6 +865,25 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) c->cputype = CPU_BCM4710; __cpu_name[cpu] = "Broadcom BCM4710"; break; case PRID_IMP_BCM6345: c->cputype = CPU_BCM6345; __cpu_name[cpu] = "Broadcom BCM6345"; break; case PRID_IMP_BCM6348: c->cputype = CPU_BCM6348; __cpu_name[cpu] = "Broadcom BCM6348"; break; case PRID_IMP_BCM4350: switch (c->processor_id & 0xf0) { case PRID_REV_BCM6358: c->cputype = CPU_BCM6358; __cpu_name[cpu] = "Broadcom BCM6358"; break; default: c->cputype = CPU_UNKNOWN; break; } break; } } Loading
arch/mips/mm/tlbex.c +4 −0 Original line number Diff line number Diff line Loading @@ -321,6 +321,10 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_BCM3302: case CPU_BCM4710: case CPU_LOONGSON2: case CPU_BCM6338: case CPU_BCM6345: case CPU_BCM6348: case CPU_BCM6358: case CPU_R5500: if (m4kc_tlbp_war()) uasm_i_nop(p); Loading