Commit 0dcc144a authored by Bailey Forrest's avatar Bailey Forrest Committed by David S. Miller
Browse files

gve: DQO: Configure interrupts on device up 



When interrupts are first enabled, we also set the ratelimits, which
will be static for the entire usage of the device.

Signed-off-by: default avatarBailey Forrest <bcf@google.com>
Reviewed-by: default avatarWillem de Bruijn <willemb@google.com>
Reviewed-by: default avatarCatherine Sullivan <csully@google.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9c1a59a2

drivers/net/ethernet/google/gve/gve_dqo.h

+19 −0
Original line number Diff line number Diff line
@@ -13,6 +13,9 @@ 
#define GVE_ITR_CLEAR_PBA_BIT_DQO BIT(1)

#define GVE_ITR_NO_UPDATE_DQO (3 << 3)



#define GVE_ITR_INTERVAL_DQO_SHIFT 5

#define GVE_ITR_INTERVAL_DQO_MASK ((1 << 12) - 1)



#define GVE_TX_IRQ_RATELIMIT_US_DQO 50

#define GVE_RX_IRQ_RATELIMIT_US_DQO 20
@@ -38,6 +41,22 @@ gve_tx_put_doorbell_dqo(const struct gve_priv *priv, 
	iowrite32(val, &priv->db_bar2[index]);

}



/* Builds register value to write to DQO IRQ doorbell to enable with specified

 * ratelimit.

 */

static inline u32 gve_set_itr_ratelimit_dqo(u32 ratelimit_us)

{

	u32 result = GVE_ITR_ENABLE_BIT_DQO;



	/* Interval has 2us granularity. */

	ratelimit_us >>= 1;



	ratelimit_us &= GVE_ITR_INTERVAL_DQO_MASK;

	result |= (ratelimit_us << GVE_ITR_INTERVAL_DQO_SHIFT);



	return result;

}



static inline void

gve_write_irq_doorbell_dqo(const struct gve_priv *priv,

			   const struct gve_notify_block *block, u32 val)

drivers/net/ethernet/google/gve/gve_main.c

+14 −2
Original line number Diff line number Diff line
@@ -1077,14 +1077,26 @@ static void gve_turnup(struct gve_priv *priv) 
		struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];



		napi_enable(&block->napi);

		if (gve_is_gqi(priv)) {

			iowrite32be(0, gve_irq_doorbell(priv, block));

		} else {

			u32 val = gve_set_itr_ratelimit_dqo(GVE_TX_IRQ_RATELIMIT_US_DQO);



			gve_write_irq_doorbell_dqo(priv, block, val);

		}

	}

	for (idx = 0; idx < priv->rx_cfg.num_queues; idx++) {

		int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);

		struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];



		napi_enable(&block->napi);

		if (gve_is_gqi(priv)) {

			iowrite32be(0, gve_irq_doorbell(priv, block));

		} else {

			u32 val = gve_set_itr_ratelimit_dqo(GVE_RX_IRQ_RATELIMIT_US_DQO);



			gve_write_irq_doorbell_dqo(priv, block, val);

		}

	}



	gve_set_napi_enabled(priv);