Commit 0dc64c2b authored by Manish Narani's avatar Manish Narani Committed by Ulf Hansson
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firmware: xilinx: Add DLL reset support



SD DLL resets are required for some of the operations on ZynqMP platform.
Add DLL reset support in ZynqMP firmware driver for SD DLL reset.

Signed-off-by: default avatarManish Narani <manish.narani@xilinx.com>
Acked-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/1579602095-30060-3-git-send-email-manish.narani@xilinx.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 93660d83
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+1 −0
Original line number Diff line number Diff line
@@ -512,6 +512,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
static inline int zynqmp_is_valid_ioctl(u32 ioctl_id)
{
	switch (ioctl_id) {
	case IOCTL_SD_DLL_RESET:
	case IOCTL_SET_SD_TAPDELAY:
	case IOCTL_SET_PLL_FRAC_MODE:
	case IOCTL_GET_PLL_FRAC_MODE:
+8 −1
Original line number Diff line number Diff line
@@ -100,7 +100,8 @@ enum pm_ret_status {
};

enum pm_ioctl_id {
	IOCTL_SET_SD_TAPDELAY = 7,
	IOCTL_SD_DLL_RESET = 6,
	IOCTL_SET_SD_TAPDELAY,
	IOCTL_SET_PLL_FRAC_MODE,
	IOCTL_GET_PLL_FRAC_MODE,
	IOCTL_SET_PLL_FRAC_DATA,
@@ -271,6 +272,12 @@ enum tap_delay_type {
	PM_TAPDELAY_OUTPUT,
};

enum dll_reset_type {
	PM_DLL_RESET_ASSERT,
	PM_DLL_RESET_RELEASE,
	PM_DLL_RESET_PULSE,
};

/**
 * struct zynqmp_pm_query_data - PM query data
 * @qid:	query ID