Loading arch/arm/mach-integrator/core.c +5 −5 Original line number Diff line number Diff line Loading @@ -44,7 +44,7 @@ static struct amba_device rtc_device = { .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_RTCINT, NO_IRQ }, .irq = { IRQ_RTCINT }, }; static struct amba_device uart0_device = { Loading @@ -57,7 +57,7 @@ static struct amba_device uart0_device = { .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT0, NO_IRQ }, .irq = { IRQ_UARTINT0 }, }; static struct amba_device uart1_device = { Loading @@ -70,7 +70,7 @@ static struct amba_device uart1_device = { .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT1, NO_IRQ }, .irq = { IRQ_UARTINT1 }, }; static struct amba_device kmi0_device = { Loading @@ -82,7 +82,7 @@ static struct amba_device kmi0_device = { .end = KMI0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT0, NO_IRQ }, .irq = { IRQ_KMIINT0 }, }; static struct amba_device kmi1_device = { Loading @@ -94,7 +94,7 @@ static struct amba_device kmi1_device = { .end = KMI1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT1, NO_IRQ }, .irq = { IRQ_KMIINT1 }, }; static struct amba_device *amba_devs[] __initdata = { Loading arch/arm/mach-integrator/integrator_cp.c +2 −2 Original line number Diff line number Diff line Loading @@ -370,7 +370,7 @@ static struct amba_device aaci_device = { .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_CP_AACIINT, NO_IRQ }, .irq = { IRQ_CP_AACIINT }, .periphid = 0, }; Loading Loading @@ -437,7 +437,7 @@ static struct amba_device clcd_device = { .flags = IORESOURCE_MEM, }, .dma_mask = ~0, .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, .irq = { IRQ_CP_CLCDCINT }, .periphid = 0, }; Loading arch/arm/mach-realview/realview_eb.c +20 −20 Original line number Diff line number Diff line Loading @@ -140,40 +140,40 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * These devices are connected via the core APB bridge */ #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } #define GPIO2_IRQ { IRQ_EB_GPIO2 } #define GPIO3_IRQ { IRQ_EB_GPIO3 } #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } #define AACI_IRQ { IRQ_EB_AACI } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } #define KMI0_IRQ { IRQ_EB_KMI0 } #define KMI1_IRQ { IRQ_EB_KMI1 } /* * These devices are connected directly to the multi-layer AHB switch */ #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } #define EB_SMC_IRQ { } #define MPMC_IRQ { } #define EB_CLCD_IRQ { IRQ_EB_CLCD } #define DMAC_IRQ { IRQ_EB_DMA } /* * These devices are connected via the core APB bridge */ #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } #define SCTL_IRQ { } #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } #define GPIO1_IRQ { IRQ_EB_GPIO1 } #define EB_RTC_IRQ { IRQ_EB_RTC } /* * These devices are connected via the DMA APB bridge */ #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } #define SCI_IRQ { IRQ_EB_SCI } #define EB_UART0_IRQ { IRQ_EB_UART0 } #define EB_UART1_IRQ { IRQ_EB_UART1 } #define EB_UART2_IRQ { IRQ_EB_UART2 } #define EB_UART3_IRQ { IRQ_EB_UART3 } #define EB_SSP_IRQ { IRQ_EB_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading arch/arm/mach-realview/realview_pb1176.c +20 −20 Original line number Diff line number Diff line Loading @@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * RealView PB1176 AMBA devices */ #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } #define AACI_IRQ { IRQ_PB1176_AACI } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } #define KMI0_IRQ { IRQ_PB1176_KMI0 } #define KMI1_IRQ { IRQ_PB1176_KMI1 } #define PB1176_SMC_IRQ { } #define MPMC_IRQ { } #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } #define SCTL_IRQ { } #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } #define SCI_IRQ { IRQ_PB1176_SCI } #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading arch/arm/mach-realview/realview_pb11mp.c +20 −20 Original line number Diff line number Diff line Loading @@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB11MPCore AMBA devices */ #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } #define AACI_IRQ { IRQ_TC11MP_AACI } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } #define KMI0_IRQ { IRQ_TC11MP_KMI0 } #define KMI1_IRQ { IRQ_TC11MP_KMI1 } #define PB11MP_SMC_IRQ { } #define MPMC_IRQ { } #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } #define DMAC_IRQ { IRQ_PB11MP_DMAC } #define SCTL_IRQ { } #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } #define SCI_IRQ { IRQ_PB11MP_SCI } #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading Loading
arch/arm/mach-integrator/core.c +5 −5 Original line number Diff line number Diff line Loading @@ -44,7 +44,7 @@ static struct amba_device rtc_device = { .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_RTCINT, NO_IRQ }, .irq = { IRQ_RTCINT }, }; static struct amba_device uart0_device = { Loading @@ -57,7 +57,7 @@ static struct amba_device uart0_device = { .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT0, NO_IRQ }, .irq = { IRQ_UARTINT0 }, }; static struct amba_device uart1_device = { Loading @@ -70,7 +70,7 @@ static struct amba_device uart1_device = { .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT1, NO_IRQ }, .irq = { IRQ_UARTINT1 }, }; static struct amba_device kmi0_device = { Loading @@ -82,7 +82,7 @@ static struct amba_device kmi0_device = { .end = KMI0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT0, NO_IRQ }, .irq = { IRQ_KMIINT0 }, }; static struct amba_device kmi1_device = { Loading @@ -94,7 +94,7 @@ static struct amba_device kmi1_device = { .end = KMI1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT1, NO_IRQ }, .irq = { IRQ_KMIINT1 }, }; static struct amba_device *amba_devs[] __initdata = { Loading
arch/arm/mach-integrator/integrator_cp.c +2 −2 Original line number Diff line number Diff line Loading @@ -370,7 +370,7 @@ static struct amba_device aaci_device = { .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, .irq = { IRQ_CP_AACIINT, NO_IRQ }, .irq = { IRQ_CP_AACIINT }, .periphid = 0, }; Loading Loading @@ -437,7 +437,7 @@ static struct amba_device clcd_device = { .flags = IORESOURCE_MEM, }, .dma_mask = ~0, .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, .irq = { IRQ_CP_CLCDCINT }, .periphid = 0, }; Loading
arch/arm/mach-realview/realview_eb.c +20 −20 Original line number Diff line number Diff line Loading @@ -140,40 +140,40 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * These devices are connected via the core APB bridge */ #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } #define GPIO2_IRQ { IRQ_EB_GPIO2 } #define GPIO3_IRQ { IRQ_EB_GPIO3 } #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } #define AACI_IRQ { IRQ_EB_AACI } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } #define KMI0_IRQ { IRQ_EB_KMI0 } #define KMI1_IRQ { IRQ_EB_KMI1 } /* * These devices are connected directly to the multi-layer AHB switch */ #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } #define EB_SMC_IRQ { } #define MPMC_IRQ { } #define EB_CLCD_IRQ { IRQ_EB_CLCD } #define DMAC_IRQ { IRQ_EB_DMA } /* * These devices are connected via the core APB bridge */ #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } #define SCTL_IRQ { } #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } #define GPIO1_IRQ { IRQ_EB_GPIO1 } #define EB_RTC_IRQ { IRQ_EB_RTC } /* * These devices are connected via the DMA APB bridge */ #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } #define SCI_IRQ { IRQ_EB_SCI } #define EB_UART0_IRQ { IRQ_EB_UART0 } #define EB_UART1_IRQ { IRQ_EB_UART1 } #define EB_UART2_IRQ { IRQ_EB_UART2 } #define EB_UART3_IRQ { IRQ_EB_UART3 } #define EB_SSP_IRQ { IRQ_EB_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading
arch/arm/mach-realview/realview_pb1176.c +20 −20 Original line number Diff line number Diff line Loading @@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * RealView PB1176 AMBA devices */ #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } #define AACI_IRQ { IRQ_PB1176_AACI } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } #define KMI0_IRQ { IRQ_PB1176_KMI0 } #define KMI1_IRQ { IRQ_PB1176_KMI1 } #define PB1176_SMC_IRQ { } #define MPMC_IRQ { } #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } #define SCTL_IRQ { } #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } #define SCI_IRQ { IRQ_PB1176_SCI } #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading
arch/arm/mach-realview/realview_pb11mp.c +20 −20 Original line number Diff line number Diff line Loading @@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB11MPCore AMBA devices */ #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } #define AACI_IRQ { IRQ_TC11MP_AACI } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } #define MPMC_IRQ { NO_IRQ, NO_IRQ } #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } #define SCTL_IRQ { NO_IRQ, NO_IRQ } #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } #define KMI0_IRQ { IRQ_TC11MP_KMI0 } #define KMI1_IRQ { IRQ_TC11MP_KMI1 } #define PB11MP_SMC_IRQ { } #define MPMC_IRQ { } #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } #define DMAC_IRQ { IRQ_PB11MP_DMAC } #define SCTL_IRQ { } #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } #define SCI_IRQ { IRQ_PB11MP_SCI } #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); Loading