Commit 0da6f6e5 authored by Victor Skvortsov's avatar Victor Skvortsov Committed by Alex Deucher
Browse files

drm/amdgpu: Add *_SOC15_IP_NO_KIQ() macro definitions 



Add helper macros to change register access
from direct to indirect.

Signed-off-by: default avatarVictor Skvortsov <victor.skvortsov@amd.com>
Reviewed-by: default avatarDavid Nieto <david.nieto@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b18ff692

drivers/gpu/drm/amd/amdgpu/soc15_common.h

+5 −0
Original line number Diff line number Diff line
@@ -51,6 +51,8 @@ 


#define RREG32_SOC15_IP(ip, reg) __RREG32_SOC15_RLC__(reg, 0, ip##_HWIP)



#define RREG32_SOC15_IP_NO_KIQ(ip, reg) __RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ, ip##_HWIP)



#define RREG32_SOC15_NO_KIQ(ip, inst, reg) \

	__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \

			 AMDGPU_REGS_NO_KIQ, ip##_HWIP)
@@ -65,6 +67,9 @@ 
#define WREG32_SOC15_IP(ip, reg, value) \

	 __WREG32_SOC15_RLC__(reg, value, 0, ip##_HWIP)



#define WREG32_SOC15_IP_NO_KIQ(ip, reg, value) \

	 __WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ, ip##_HWIP)



#define WREG32_SOC15_NO_KIQ(ip, inst, reg, value) \

	__WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \

			     value, AMDGPU_REGS_NO_KIQ, ip##_HWIP)