Commit 0d90bd55 authored by Leon Romanovsky's avatar Leon Romanovsky
Browse files

net/mlx5: Remove FPGA ipsec specific statistics 

Delete the statistics that is not used anymore.

Link: https://lore.kernel.org/r/3f194752881e095910c887dd5cede1dcba6acaf3.1649232994.git.leonro@nvidia.com


Reviewed-by: default avatarRaed Salem <raeds@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
parent 3c811a6b

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h

+0 −19
Original line number Diff line number Diff line
@@ -55,24 +55,6 @@ struct mlx5e_ipsec_sw_stats { 
	atomic64_t ipsec_tx_drop_no_state;

	atomic64_t ipsec_tx_drop_not_ip;

	atomic64_t ipsec_tx_drop_trailer;

	atomic64_t ipsec_tx_drop_metadata;

};



struct mlx5e_ipsec_stats {

	u64 ipsec_dec_in_packets;

	u64 ipsec_dec_out_packets;

	u64 ipsec_dec_bypass_packets;

	u64 ipsec_enc_in_packets;

	u64 ipsec_enc_out_packets;

	u64 ipsec_enc_bypass_packets;

	u64 ipsec_dec_drop_packets;

	u64 ipsec_dec_auth_fail_packets;

	u64 ipsec_enc_drop_packets;

	u64 ipsec_add_sa_success;

	u64 ipsec_add_sa_fail;

	u64 ipsec_del_sa_success;

	u64 ipsec_del_sa_fail;

	u64 ipsec_cmd_drop;

};



struct mlx5e_accel_fs_esp;
@@ -83,7 +65,6 @@ struct mlx5e_ipsec { 
	DECLARE_HASHTABLE(sadb_rx, MLX5E_IPSEC_SADB_RX_BITS);

	spinlock_t sadb_rx_lock; /* Protects sadb_rx */

	struct mlx5e_ipsec_sw_stats sw_stats;

	struct mlx5e_ipsec_stats stats;

	struct workqueue_struct *wq;

	struct mlx5e_accel_fs_esp *rx_fs;

	struct mlx5e_ipsec_tx *tx_fs;

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c

+0 −46
Original line number Diff line number Diff line
@@ -39,23 +39,6 @@ 
#include "fpga/sdk.h"

#include "en_accel/ipsec.h"



static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_out_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_bypass_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_in_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_out_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_bypass_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_drop_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_auth_fail_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_drop_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_success) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_fail) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_success) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_fail) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_cmd_drop) },

};



static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = {

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sp_alloc) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sadb_miss) },
@@ -64,13 +47,11 @@ static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = { 
	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_no_state) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_not_ip) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_trailer) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_metadata) },

};



#define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \

	atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))



#define NUM_IPSEC_HW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_hw_stats_desc)

#define NUM_IPSEC_SW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_sw_stats_desc)



static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_sw)
@@ -102,31 +83,4 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_sw) 
	return idx;

}



static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_hw)

{

	return 0;

}



static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_hw)

{

	int ret = 0;



	if (priv->ipsec)

		ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,

						     NUM_IPSEC_HW_COUNTERS);

	if (ret)

		memset(&priv->ipsec->stats, 0, sizeof(priv->ipsec->stats));

}



static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_hw)

{

	return idx;

}



static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_hw)

{

	return idx;

}



MLX5E_DEFINE_STATS_GRP(ipsec_sw, 0);
 
MLX5E_DEFINE_STATS_GRP(ipsec_hw, 0);

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c

+0 −1
Original line number Diff line number Diff line
@@ -1112,7 +1112,6 @@ static mlx5e_stats_grp_t mlx5e_ul_rep_stats_grps[] = { 
	&MLX5E_STATS_GRP(per_port_buff_congest),

#ifdef CONFIG_MLX5_EN_IPSEC

	&MLX5E_STATS_GRP(ipsec_sw),

	&MLX5E_STATS_GRP(ipsec_hw),

#endif

	&MLX5E_STATS_GRP(ptp),

};

drivers/net/ethernet/mellanox/mlx5/core/en_stats.c

+0 −1
Original line number Diff line number Diff line
@@ -2443,7 +2443,6 @@ mlx5e_stats_grp_t mlx5e_nic_stats_grps[] = { 
	&MLX5E_STATS_GRP(pme),

#ifdef CONFIG_MLX5_EN_IPSEC

	&MLX5E_STATS_GRP(ipsec_sw),

	&MLX5E_STATS_GRP(ipsec_hw),

#endif

	&MLX5E_STATS_GRP(tls),

	&MLX5E_STATS_GRP(channels),

drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

+0 −1
Original line number Diff line number Diff line
@@ -482,7 +482,6 @@ extern MLX5E_DECLARE_STATS_GRP(per_prio); 
extern MLX5E_DECLARE_STATS_GRP(pme);

extern MLX5E_DECLARE_STATS_GRP(channels);

extern MLX5E_DECLARE_STATS_GRP(per_port_buff_congest);

extern MLX5E_DECLARE_STATS_GRP(ipsec_hw);

extern MLX5E_DECLARE_STATS_GRP(ipsec_sw);

extern MLX5E_DECLARE_STATS_GRP(ptp);